[clang] [llvm] Remove Native Client support (PR #133661)
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Sun Mar 30 15:49:51 PDT 2025
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions h,cpp,c -- clang/include/clang/Basic/TargetInfo.h clang/lib/AST/ASTContext.cpp clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/ARM.cpp clang/lib/Basic/Targets/OSTargets.h clang/lib/CodeGen/CodeGenModule.cpp clang/lib/CodeGen/TargetInfo.h clang/lib/CodeGen/Targets/X86.cpp clang/lib/Driver/Driver.cpp clang/lib/Lex/InitHeaderSearch.cpp clang/test/CodeGen/X86/x86_64-longdouble.c clang/test/CodeGen/arm-aapcs-vfp.c clang/test/CodeGen/ext-int-cc.c clang/test/CodeGen/long_double_fp128.cpp clang/test/CodeGen/target-data.c clang/test/Driver/arm-alignment.c clang/test/Driver/unsupported-target-arch.c clang/test/Preprocessor/predefined-macros-no-warnings.c llvm/include/llvm/BinaryFormat/ELF.h llvm/include/llvm/CodeGen/AtomicExpandUtils.h llvm/include/llvm/TargetParser/Triple.h llvm/lib/Target/ARM/ARMAsmPrinter.cpp llvm/lib/Target/ARM/ARMFastISel.cpp llvm/lib/Target/ARM/ARMFrameLowering.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMSubtarget.cpp llvm/lib/Target/ARM/ARMSubtarget.h llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/ARM/ARMTargetTransformInfo.h llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp llvm/lib/Target/Mips/MipsAsmPrinter.cpp llvm/lib/Target/Mips/MipsAsmPrinter.h llvm/lib/Target/Mips/MipsBranchExpansion.cpp llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp llvm/lib/Target/Mips/MipsRegisterInfo.cpp llvm/lib/Target/Mips/MipsSubtarget.h llvm/lib/Target/X86/X86ExpandPseudo.cpp llvm/lib/Target/X86/X86FrameLowering.cpp llvm/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86Subtarget.cpp llvm/lib/Target/X86/X86Subtarget.h llvm/lib/Target/X86/X86TargetMachine.cpp llvm/lib/TargetParser/ARMTargetParser.cpp llvm/lib/TargetParser/Triple.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index eef35bb9c..16fa3fa3e 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -2636,7 +2636,7 @@ bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) {
}
case Intrinsic::trap: {
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
- TII.get(Subtarget->isThumb() ? ARM::tTRAP : ARM::TRAP));
+ TII.get(Subtarget->isThumb() ? ARM::tTRAP : ARM::TRAP));
return true;
}
}
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 93016bb4d..4998e8919 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1748,8 +1748,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
RetOpcode == ARM::TCRETURNrinotr12);
isInterrupt =
RetOpcode == ARM::SUBS_PC_LR || RetOpcode == ARM::t2SUBS_PC_LR;
- isTrap =
- RetOpcode == ARM::TRAP || RetOpcode == ARM::tTRAP;
+ isTrap = RetOpcode == ARM::TRAP || RetOpcode == ARM::tTRAP;
isCmseEntry = (RetOpcode == ARM::tBXNS || RetOpcode == ARM::tBXNS_RET);
}
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index f4aff1141..6489f5794 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -441,9 +441,8 @@ bool ARMSubtarget::useFastISel() const {
return false;
// Thumb2 support on iOS; ARM support on iOS and Linux.
- return TM.Options.EnableFastISel &&
- ((isTargetMachO() && !isThumb1Only()) ||
- (isTargetLinux() && !isThumb()));
+ return TM.Options.EnableFastISel && ((isTargetMachO() && !isThumb1Only()) ||
+ (isTargetLinux() && !isThumb()));
}
unsigned ARMSubtarget::getGPRAllocationOrder(const MachineFunction &MF) const {
diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
index 599e64296..9a7ae71bb 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
@@ -70,31 +70,65 @@ class ARMTTIImpl : public BasicTTIImplBase<ARMTTIImpl> {
// -thumb-mode in a caller with +thumb-mode, may cause the assembler to
// fail if the callee uses ARM only instructions, e.g. in inline asm.
const FeatureBitset InlineFeaturesAllowed = {
- ARM::FeatureVFP2, ARM::FeatureVFP3, ARM::FeatureNEON, ARM::FeatureThumb2,
- ARM::FeatureFP16, ARM::FeatureVFP4, ARM::FeatureFPARMv8,
- ARM::FeatureFullFP16, ARM::FeatureFP16FML, ARM::FeatureHWDivThumb,
- ARM::FeatureHWDivARM, ARM::FeatureDB, ARM::FeatureV7Clrex,
- ARM::FeatureAcquireRelease, ARM::FeatureSlowFPBrcc,
- ARM::FeaturePerfMon, ARM::FeatureTrustZone, ARM::Feature8MSecExt,
- ARM::FeatureCrypto, ARM::FeatureCRC, ARM::FeatureRAS,
- ARM::FeatureFPAO, ARM::FeatureFuseAES, ARM::FeatureZCZeroing,
- ARM::FeatureProfUnpredicate, ARM::FeatureSlowVGETLNi32,
- ARM::FeatureSlowVDUP32, ARM::FeaturePreferVMOVSR,
- ARM::FeaturePrefISHSTBarrier, ARM::FeatureMuxedUnits,
- ARM::FeatureSlowOddRegister, ARM::FeatureSlowLoadDSubreg,
- ARM::FeatureDontWidenVMOVS, ARM::FeatureExpandMLx,
- ARM::FeatureHasVMLxHazards, ARM::FeatureNEONForFPMovs,
- ARM::FeatureNEONForFP, ARM::FeatureCheckVLDnAlign,
- ARM::FeatureHasSlowFPVMLx, ARM::FeatureHasSlowFPVFMx,
- ARM::FeatureVMLxForwarding, ARM::FeaturePref32BitThumb,
- ARM::FeatureAvoidPartialCPSR, ARM::FeatureCheapPredicableCPSR,
- ARM::FeatureAvoidMOVsShOp, ARM::FeatureHasRetAddrStack,
- ARM::FeatureHasNoBranchPredictor, ARM::FeatureDSP, ARM::FeatureMP,
- ARM::FeatureVirtualization, ARM::FeatureMClass, ARM::FeatureRClass,
- ARM::FeatureAClass, ARM::FeatureStrictAlign, ARM::FeatureLongCalls,
- ARM::FeatureExecuteOnly, ARM::FeatureReserveR9, ARM::FeatureNoMovt,
- ARM::FeatureNoNegativeImmediates
- };
+ ARM::FeatureVFP2,
+ ARM::FeatureVFP3,
+ ARM::FeatureNEON,
+ ARM::FeatureThumb2,
+ ARM::FeatureFP16,
+ ARM::FeatureVFP4,
+ ARM::FeatureFPARMv8,
+ ARM::FeatureFullFP16,
+ ARM::FeatureFP16FML,
+ ARM::FeatureHWDivThumb,
+ ARM::FeatureHWDivARM,
+ ARM::FeatureDB,
+ ARM::FeatureV7Clrex,
+ ARM::FeatureAcquireRelease,
+ ARM::FeatureSlowFPBrcc,
+ ARM::FeaturePerfMon,
+ ARM::FeatureTrustZone,
+ ARM::Feature8MSecExt,
+ ARM::FeatureCrypto,
+ ARM::FeatureCRC,
+ ARM::FeatureRAS,
+ ARM::FeatureFPAO,
+ ARM::FeatureFuseAES,
+ ARM::FeatureZCZeroing,
+ ARM::FeatureProfUnpredicate,
+ ARM::FeatureSlowVGETLNi32,
+ ARM::FeatureSlowVDUP32,
+ ARM::FeaturePreferVMOVSR,
+ ARM::FeaturePrefISHSTBarrier,
+ ARM::FeatureMuxedUnits,
+ ARM::FeatureSlowOddRegister,
+ ARM::FeatureSlowLoadDSubreg,
+ ARM::FeatureDontWidenVMOVS,
+ ARM::FeatureExpandMLx,
+ ARM::FeatureHasVMLxHazards,
+ ARM::FeatureNEONForFPMovs,
+ ARM::FeatureNEONForFP,
+ ARM::FeatureCheckVLDnAlign,
+ ARM::FeatureHasSlowFPVMLx,
+ ARM::FeatureHasSlowFPVFMx,
+ ARM::FeatureVMLxForwarding,
+ ARM::FeaturePref32BitThumb,
+ ARM::FeatureAvoidPartialCPSR,
+ ARM::FeatureCheapPredicableCPSR,
+ ARM::FeatureAvoidMOVsShOp,
+ ARM::FeatureHasRetAddrStack,
+ ARM::FeatureHasNoBranchPredictor,
+ ARM::FeatureDSP,
+ ARM::FeatureMP,
+ ARM::FeatureVirtualization,
+ ARM::FeatureMClass,
+ ARM::FeatureRClass,
+ ARM::FeatureAClass,
+ ARM::FeatureStrictAlign,
+ ARM::FeatureLongCalls,
+ ARM::FeatureExecuteOnly,
+ ARM::FeatureReserveR9,
+ ARM::FeatureNoMovt,
+ ARM::FeatureNoNegativeImmediates};
const ARMSubtarget *getST() const { return ST; }
const ARMTargetLowering *getTLI() const { return TLI; }
diff --git a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
index cb5ebea3a..56d535e5d 100644
--- a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
+++ b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
@@ -529,9 +529,9 @@ void MipsBranchExpansion::expandToLongBranch(MBBInfo &I) {
.addImm(8);
}
if (hasDelaySlot) {
- BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
- .addReg(Mips::SP)
- .addImm(8);
+ BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
+ .addReg(Mips::SP)
+ .addImm(8);
BalTgtMBB->rbegin()->bundleWithPred();
}
} else {
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index dc5412cfb..c99a97dc7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36372,8 +36372,7 @@ X86TargetLowering::EmitLoweredSegAlloca(MachineInstr &MI,
tmpSPVReg = MRI.createVirtualRegister(AddrRegClass),
SPLimitVReg = MRI.createVirtualRegister(AddrRegClass),
sizeVReg = MI.getOperand(1).getReg(),
- physSPReg =
- IsLP64 ? X86::RSP : X86::ESP;
+ physSPReg = IsLP64 ? X86::RSP : X86::ESP;
MachineFunction::iterator MBBIter = ++BB->getIterator();
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index b594bf5de..540f67c70 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -307,8 +307,7 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
// following the i386 psABI, while on Illumos it is always 16 bytes.
if (StackAlignOverride)
stackAlignment = *StackAlignOverride;
- else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
- Is64Bit)
+ else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() || Is64Bit)
stackAlignment = Align(16);
// Consume the vector width attribute or apply any target specific limit.
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 8b5fb6b2f..230280b4f 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -170,14 +170,10 @@ public:
#include "X86GenSubtargetInfo.inc"
/// Is this x86_64 with the ILP32 programming model (x32 ABI)?
- bool isTarget64BitILP32() const {
- return Is64Bit && (TargetTriple.isX32());
- }
+ bool isTarget64BitILP32() const { return Is64Bit && (TargetTriple.isX32()); }
/// Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
- bool isTarget64BitLP64() const {
- return Is64Bit && (!TargetTriple.isX32());
- }
+ bool isTarget64BitLP64() const { return Is64Bit && (!TargetTriple.isX32()); }
PICStyles::Style getPICStyle() const { return PICStyle; }
void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 46a6b7b37..70260a065 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -300,7 +300,8 @@ StringRef Triple::getOSTypeName(OSType Kind) {
case Lv2: return "lv2";
case MacOSX: return "macosx";
case Mesa3D: return "mesa3d";
- case NVCL: return "nvcl";
+ case NVCL:
+ return "nvcl";
case NetBSD: return "netbsd";
case OpenBSD: return "openbsd";
case PS4: return "ps4";
@@ -668,48 +669,48 @@ static Triple::VendorType parseVendor(StringRef VendorName) {
static Triple::OSType parseOS(StringRef OSName) {
return StringSwitch<Triple::OSType>(OSName)
- .StartsWith("darwin", Triple::Darwin)
- .StartsWith("dragonfly", Triple::DragonFly)
- .StartsWith("freebsd", Triple::FreeBSD)
- .StartsWith("fuchsia", Triple::Fuchsia)
- .StartsWith("ios", Triple::IOS)
- .StartsWith("kfreebsd", Triple::KFreeBSD)
- .StartsWith("linux", Triple::Linux)
- .StartsWith("lv2", Triple::Lv2)
- .StartsWith("macos", Triple::MacOSX)
- .StartsWith("netbsd", Triple::NetBSD)
- .StartsWith("openbsd", Triple::OpenBSD)
- .StartsWith("solaris", Triple::Solaris)
- .StartsWith("uefi", Triple::UEFI)
- .StartsWith("win32", Triple::Win32)
- .StartsWith("windows", Triple::Win32)
- .StartsWith("zos", Triple::ZOS)
- .StartsWith("haiku", Triple::Haiku)
- .StartsWith("rtems", Triple::RTEMS)
- .StartsWith("aix", Triple::AIX)
- .StartsWith("cuda", Triple::CUDA)
- .StartsWith("nvcl", Triple::NVCL)
- .StartsWith("amdhsa", Triple::AMDHSA)
- .StartsWith("ps4", Triple::PS4)
- .StartsWith("ps5", Triple::PS5)
- .StartsWith("elfiamcu", Triple::ELFIAMCU)
- .StartsWith("tvos", Triple::TvOS)
- .StartsWith("watchos", Triple::WatchOS)
- .StartsWith("bridgeos", Triple::BridgeOS)
- .StartsWith("driverkit", Triple::DriverKit)
- .StartsWith("xros", Triple::XROS)
- .StartsWith("visionos", Triple::XROS)
- .StartsWith("mesa3d", Triple::Mesa3D)
- .StartsWith("amdpal", Triple::AMDPAL)
- .StartsWith("hermit", Triple::HermitCore)
- .StartsWith("hurd", Triple::Hurd)
- .StartsWith("wasi", Triple::WASI)
- .StartsWith("emscripten", Triple::Emscripten)
- .StartsWith("shadermodel", Triple::ShaderModel)
- .StartsWith("liteos", Triple::LiteOS)
- .StartsWith("serenity", Triple::Serenity)
- .StartsWith("vulkan", Triple::Vulkan)
- .Default(Triple::UnknownOS);
+ .StartsWith("darwin", Triple::Darwin)
+ .StartsWith("dragonfly", Triple::DragonFly)
+ .StartsWith("freebsd", Triple::FreeBSD)
+ .StartsWith("fuchsia", Triple::Fuchsia)
+ .StartsWith("ios", Triple::IOS)
+ .StartsWith("kfreebsd", Triple::KFreeBSD)
+ .StartsWith("linux", Triple::Linux)
+ .StartsWith("lv2", Triple::Lv2)
+ .StartsWith("macos", Triple::MacOSX)
+ .StartsWith("netbsd", Triple::NetBSD)
+ .StartsWith("openbsd", Triple::OpenBSD)
+ .StartsWith("solaris", Triple::Solaris)
+ .StartsWith("uefi", Triple::UEFI)
+ .StartsWith("win32", Triple::Win32)
+ .StartsWith("windows", Triple::Win32)
+ .StartsWith("zos", Triple::ZOS)
+ .StartsWith("haiku", Triple::Haiku)
+ .StartsWith("rtems", Triple::RTEMS)
+ .StartsWith("aix", Triple::AIX)
+ .StartsWith("cuda", Triple::CUDA)
+ .StartsWith("nvcl", Triple::NVCL)
+ .StartsWith("amdhsa", Triple::AMDHSA)
+ .StartsWith("ps4", Triple::PS4)
+ .StartsWith("ps5", Triple::PS5)
+ .StartsWith("elfiamcu", Triple::ELFIAMCU)
+ .StartsWith("tvos", Triple::TvOS)
+ .StartsWith("watchos", Triple::WatchOS)
+ .StartsWith("bridgeos", Triple::BridgeOS)
+ .StartsWith("driverkit", Triple::DriverKit)
+ .StartsWith("xros", Triple::XROS)
+ .StartsWith("visionos", Triple::XROS)
+ .StartsWith("mesa3d", Triple::Mesa3D)
+ .StartsWith("amdpal", Triple::AMDPAL)
+ .StartsWith("hermit", Triple::HermitCore)
+ .StartsWith("hurd", Triple::Hurd)
+ .StartsWith("wasi", Triple::WASI)
+ .StartsWith("emscripten", Triple::Emscripten)
+ .StartsWith("shadermodel", Triple::ShaderModel)
+ .StartsWith("liteos", Triple::LiteOS)
+ .StartsWith("serenity", Triple::Serenity)
+ .StartsWith("vulkan", Triple::Vulkan)
+ .Default(Triple::UnknownOS);
}
static Triple::EnvironmentType parseEnvironment(StringRef EnvironmentName) {
``````````
</details>
https://github.com/llvm/llvm-project/pull/133661
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