[llvm] Implement areInlineCompatible for SystemZ using feature bitset (PR #132976)

[Andres Chavarria via llvm-commits]

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@@ -422,6 +422,20 @@ bool SystemZTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
              C2.ScaleCost, C2.SetupCost);
 }
 
+bool SystemZTTIImpl::areInlineCompatible(const Function *Caller,
+                                         const Function *Callee) const {
+  const TargetMachine &TM = getTLI()->getTargetMachine();
+
+  const FeatureBitset &CallerBits =
+      TM.getSubtargetImpl(*Caller)->getFeatureBits();
+  const FeatureBitset &CalleeBits =
+      TM.getSubtargetImpl(*Callee)->getFeatureBits();
+
+  // Check that target features from the callee are subset or
+  // equal to the caller's features.
+  return (CalleeBits == CallerBits) || (CalleeBits < CallerBits);
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chavandres wrote:

Got it. I agree with you on the danger of inlining without agreeing on the `vector` feature. 

So the implementation can change to only inline when the bitset are the same, unless we add logic to agree on the `vector` feature assuming that is the only problematic case?

https://github.com/llvm/llvm-project/pull/132976