[llvm] f7228f3 - MCValue: Simplify code with getSubSym
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 29 18:19:24 PDT 2025
Author: Fangrui Song
Date: 2025-03-29T18:19:19-07:00
New Revision: f7228f38b72d6bf043aa4a412ba6ebb1d5971c53
URL: https://github.com/llvm/llvm-project/commit/f7228f38b72d6bf043aa4a412ba6ebb1d5971c53
DIFF: https://github.com/llvm/llvm-project/commit/f7228f38b72d6bf043aa4a412ba6ebb1d5971c53.diff
LOG: MCValue: Simplify code with getSubSym
The MCValue::SymB MCSymbolRefExpr member might be replaced with a
MCSymbol in the future. Reduce direct access.
Added:
Modified:
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 5be4bd9ec6b26..28b4cbb5efed8 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -8214,7 +8214,7 @@ bool AArch64AsmParser::classifySymbolRef(
// Check that it looks like a symbol + an addend
MCValue Res;
bool Relocatable = Expr->evaluateAsRelocatable(Res, nullptr);
- if (!Relocatable || Res.getSymB())
+ if (!Relocatable || Res.getSubSym())
return false;
// Treat expressions with an ELFSpec (like ":abs_g1:3", or
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
index 5b9fd9a29156a..e7348326a69cf 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
@@ -163,19 +163,18 @@ void ARMMachObjectWriter::recordARMScatteredHalfRelocation(
uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
FixedValue += SecAddr;
- if (const MCSymbolRefExpr *B = Target.getSymB()) {
- const MCSymbol *SB = &B->getSymbol();
-
+ if (const MCSymbol *SB = Target.getSubSym()) {
if (!SB->getFragment()) {
- Asm.getContext().reportError(Fixup.getLoc(),
- "symbol '" + B->getSymbol().getName() +
- "' can not be undefined in a subtraction expression");
+ Asm.getContext().reportError(
+ Fixup.getLoc(),
+ "symbol '" + SB->getName() +
+ "' can not be undefined in a subtraction expression");
return;
}
// Select the appropriate
diff erence relocation type.
Type = MachO::ARM_RELOC_HALF_SECTDIFF;
- Value2 = Writer->getSymbolAddress(B->getSymbol(), Asm);
+ Value2 = Writer->getSymbolAddress(*SB, Asm);
FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
}
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index 6c27064614fed..260b0d0e31761 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -455,7 +455,7 @@ bool LoongArchAsmBackend::handleAddSubRelocations(const MCAssembler &Asm,
std::pair<MCFixupKind, MCFixupKind> FK;
uint64_t FixedValueA, FixedValueB;
const MCSymbol &SA = Target.getSymA()->getSymbol();
- const MCSymbol &SB = Target.getSymB()->getSymbol();
+ const MCSymbol &SB = *Target.getSubSym();
bool force = !SA.isInSection() || !SB.isInSection();
if (!force) {
diff --git a/llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp b/llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
index d8019f5eb785f..03a174311a6ec 100644
--- a/llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
+++ b/llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
@@ -25,9 +25,8 @@ bool M68kMCExpr::evaluateAsRelocatableImpl(MCValue &Res,
if (!getSubExpr()->evaluateAsRelocatable(Res, Asm))
return false;
- Res =
- MCValue::get(Res.getSymA(), Res.getSymB(), Res.getConstant(), specifier);
- return Res.getSymB() ? specifier == VK_None : true;
+ Res.setSpecifier(specifier);
+ return !Res.getSubSym();
}
void M68kMCExpr::visitUsedExpr(MCStreamer &S) const { S.visitUsedExpr(*Expr); }
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 640ae52d05dd1..8c6fe0b77d234 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -585,7 +585,7 @@ class MipsAsmParser : public MCTargetAsmParser {
MCValue Res;
if (!JalExpr->evaluateAsRelocatable(Res, nullptr))
return false;
- if (Res.getSymB() != nullptr)
+ if (Res.getSubSym())
return false;
if (Res.getConstant() != 0)
return ABI.IsN32() || ABI.IsN64();
@@ -2938,7 +2938,7 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
Error(IDLoc, "expected relocatable expression");
return true;
}
- if (Res.getSymB() != nullptr) {
+ if (Res.getSubSym()) {
Error(IDLoc, "expected relocatable expression with only one symbol");
return true;
}
@@ -3768,7 +3768,7 @@ void MipsAsmParser::expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
Error(IDLoc, "expected relocatable expression");
return;
}
- if (Res.getSymB() != nullptr) {
+ if (Res.getSubSym()) {
Error(IDLoc, "expected relocatable expression with only one symbol");
return;
}
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
index 107e0714b026e..4c4035b32af3e 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
@@ -45,7 +45,7 @@ bool XtensaMCExpr::evaluateAsRelocatableImpl(MCValue &Res,
if (!getSubExpr()->evaluateAsRelocatable(Res, Asm))
return false;
Res.setSpecifier(specifier);
- return !Res.getSymB();
+ return !Res.getSubSym();
}
void XtensaMCExpr::visitUsedExpr(MCStreamer &Streamer) const {
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