[llvm] [RISCV][WIP] Branch to Absolute Address (PR #133555)

[Fangrui Song via llvm-commits]

MaskRay wrote:

GNU Assembler's x86 and riscv ports treat `call constant` as branching to an absolute address, which makes sense to me. Other ports (including aarch64,powerpc,systemz) should ideally be fixed.

I agree that we have a pile of hacks to support the same mnemonic with different operand forms. Ideally they could be simplified.

```
% echo 'call 60; call 60' | ~/Dev/binutils-gdb/out/debug/gas/as-new - && fob -dr a.out

a.out:  file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <.text>:
       0: e8 00 00 00 00                callq   0x5 <.text+0x5>
                0000000000000001:  R_X86_64_PC32        *ABS*+0x38
       5: e8 00 00 00 00                callq   0xa <.text+0xa>
                0000000000000006:  R_X86_64_PC32        *ABS*+0x38

% echo 'bl 60; bl 60' | ~/Dev/binutils-gdb/out/aarch64/gas/as-new - && ~/Dev/binutils-gdb/out/aarch64/binutils/objdump -dr

a.out:     file format elf64-littleaarch64


Disassembly of section .text:

0000000000000000 <.text>:
   0:   9400000f        bl      3c <.text+0x3c>
   4:   9400000f        bl      40 <.text+0x40>

% echo 'bl 60; bl 60' | ~/Dev/binutils-gdb/out/ppc64le/gas/as-new - && ~/Dev/binutils-gdb/out/ppc64le/binutils/objdump -dr

a.out:     file format elf64-powerpcle


Disassembly of section .text:

0000000000000000 <.text>:
   0:   3d 00 00 48     bl      0x3c
   4:   3d 00 00 48     bl      0x40

% echo 'brasl %r14, 60; brasl %r14, 60' | ~/Dev/binutils-gdb/out/s390x/gas/as-new - && ~/Dev/binutils-gdb/out/s390x/binutils/objdump -dr

a.out:     file format elf64-s390

Disassembly of section .text:

0000000000000000 <.text>:
   0:   c0 e5 00 00 00 1e       brasl   %r14,0x3c
   6:   c0 e5 00 00 00 1e       brasl   %r14,0x42

% echo 'call 60; call 60' | ~/Dev/binutils-gdb/out/riscv64/gas/as-new -mno-relax - && ~/Dev/binutils-gdb/out/riscv64/binutils/objdump -dr

a.out:     file format elf64-littleriscv


Disassembly of section .text:

0000000000000000 <.text>:
   0:   00000097                auipc   ra,0x0
                        0: R_RISCV_CALL_PLT     *ABS*+0x3c
   4:   000080e7                jalr    ra # 0 <.text>
   8:   00000097                auipc   ra,0x0
                        8: R_RISCV_CALL_PLT     *ABS*+0x3c
   c:   000080e7                jalr    ra # 8 <.text+0x8>
```


https://github.com/llvm/llvm-project/pull/133555