[llvm] b9b39db - RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants
via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 29 11:12:43 PDT 2025
Author: Fangrui Song
Date: 2025-03-29T11:12:40-07:00
New Revision: b9b39db5d7677710f1d00dc8ff5844ad2abb269f
URL: https://github.com/llvm/llvm-project/commit/b9b39db5d7677710f1d00dc8ff5844ad2abb269f
DIFF: https://github.com/llvm/llvm-project/commit/b9b39db5d7677710f1d00dc8ff5844ad2abb269f.diff
LOG: RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants
An immediate operand is encoded as an `MCExpr`, with `RISCVMCExpr`
specifying an operand that includes a relocation specifier. When
https://reviews.llvm.org/D23568 added initial fixup and relocation
support in 2017, it adapted code from `PPCMCExpr` (for `@l` `@ha`) to
evaluate the `RISCVMCExpr` operand. (PPCAsmParser had considerable
technical debt, though I’ve recently streamlined it somewhat, e.g.
8560da28c69de481f3ad147722577e87b902facb)
Evaluating RISCVMCExpr during parsing is unnecessary. For example,
there's no need to treat `lui a0, %hi(2)` differently from `lui a0,
%hi(foo)` when foo has not been defined yet.
This evaluation introduces unnecessary complexity. For instance, parser
functions require an extra check like `VK == RISCVMCExpr::VK_None`, as
seen in these examples:
```
if (!evaluateConstantImm(getImm(), Imm, VK) || VK != RISCVMCExpr::VK_None)
return IsConstantImm && isUInt<N>(Imm) && VK == RISCVMCExpr::VK_None;
```
This PR eliminates the parse-time evaluation of `RISCVMCExpr`, aligning
it more closely with other targets.
---
`abs = 0x12345; lui t3, %hi(abs)` now generates
R_RISCV_HI20/R_RISCV_RELAX with linker relaxation.
(Tested by test/MC/RISCV/linker-relaxation.s)
(Notably, since commit ba2de8f22d0cac86d89c1806fb54ed3463349342 in
lld/ELF, the linker can handle R_RISCV_HI relocations with a symbol
index of 0 in -pie mode.)
Pull Request: https://github.com/llvm/llvm-project/pull/133377
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
llvm/test/MC/RISCV/insn.s
llvm/test/MC/RISCV/linker-relaxation.s
llvm/test/MC/RISCV/rv32i-aliases-valid.s
llvm/test/MC/RISCV/rv64i-aliases-valid.s
llvm/test/MC/RISCV/rv64i-valid.s
llvm/test/MC/RISCV/rvd-valid.s
llvm/test/MC/RISCV/rvf-valid.s
llvm/test/MC/RISCV/rvi-valid.s
llvm/test/MC/RISCV/rvzfbfmin-valid.s
llvm/test/MC/RISCV/rvzfh-valid.s
llvm/test/MC/RISCV/rvzfhmin-valid.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 861ccde22c5c3..c767e1e60f17f 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -526,15 +526,8 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isGPRAsFPR32() const { return isGPRF32() && Reg.IsGPRAsFPR; }
bool isGPRPairAsFPR64() const { return isGPRPair() && Reg.IsGPRAsFPR; }
- static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm,
- RISCVMCExpr::Specifier &VK) {
- if (auto *RE = dyn_cast<RISCVMCExpr>(Expr)) {
- VK = RE->getSpecifier();
- return RE->evaluateAsConstant(Imm);
- }
-
+ static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm) {
if (auto CE = dyn_cast<MCConstantExpr>(Expr)) {
- VK = RISCVMCExpr::VK_None;
Imm = CE->getValue();
return true;
}
@@ -549,7 +542,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
bool IsValid;
if (!IsConstantImm)
IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
@@ -564,7 +557,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
int64_t Imm;
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
+ if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == RISCVMCExpr::VK_None;
@@ -574,7 +567,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
int64_t Imm;
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
+ if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
(VK == RISCVMCExpr::VK_CALL || VK == RISCVMCExpr::VK_CALL_PLT);
@@ -584,7 +577,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
int64_t Imm;
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
+ if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == RISCVMCExpr::VK_CALL;
@@ -594,7 +587,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
int64_t Imm;
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
+ if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == RISCVMCExpr::VK_TPREL_ADD;
@@ -604,7 +597,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
int64_t Imm;
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
// Must be of 'immediate' type but not a constant.
- if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
+ if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == RISCVMCExpr::VK_TLSDESC_CALL;
@@ -649,61 +642,48 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isImmXLenLI() const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- if (VK == RISCVMCExpr::VK_LO || VK == RISCVMCExpr::VK_PCREL_LO ||
- VK == RISCVMCExpr::VK_TLSDESC_LOAD_LO ||
- VK == RISCVMCExpr::VK_TLSDESC_ADD_LO)
- return true;
// Given only Imm, ensuring that the actually specified constant is either
// a signed or unsigned 64-bit number is unfortunately impossible.
- if (IsConstantImm) {
- return VK == RISCVMCExpr::VK_None &&
- (isRV64Imm() || (isInt<32>(Imm) || isUInt<32>(Imm)));
- }
+ if (evaluateConstantImm(getImm(), Imm))
+ return isRV64Imm() || (isInt<32>(Imm) || isUInt<32>(Imm));
return RISCVAsmParser::isSymbolDiff(getImm());
}
bool isImmXLenLI_Restricted() const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
// 'la imm' supports constant immediates only.
- return IsConstantImm && (VK == RISCVMCExpr::VK_None) &&
+ return IsConstantImm &&
(isRV64Imm() || (isInt<32>(Imm) || isUInt<32>(Imm)));
}
template <unsigned N> bool isUImm() const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && isUInt<N>(Imm) && VK == RISCVMCExpr::VK_None;
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ return IsConstantImm && isUInt<N>(Imm);
}
template <unsigned N, unsigned S> bool isUImmShifted() const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && isShiftedUInt<N, S>(Imm) &&
- VK == RISCVMCExpr::VK_None;
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ return IsConstantImm && isShiftedUInt<N, S>(Imm);
}
template <class Pred> bool isUImmPred(Pred p) const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && p(Imm) && VK == RISCVMCExpr::VK_None;
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ return IsConstantImm && p(Imm);
}
bool isUImmLog2XLen() const {
@@ -791,22 +771,18 @@ struct RISCVOperand final : public MCParsedAsmOperand {
template <unsigned N> bool isSImm() const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && isInt<N>(fixImmediateForRV32(Imm, isRV64Imm())) &&
- VK == RISCVMCExpr::VK_None;
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ return IsConstantImm && isInt<N>(fixImmediateForRV32(Imm, isRV64Imm()));
}
template <class Pred> bool isSImmPred(Pred p) const {
int64_t Imm;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && p(fixImmediateForRV32(Imm, isRV64Imm())) &&
- VK == RISCVMCExpr::VK_None;
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ return IsConstantImm && p(fixImmediateForRV32(Imm, isRV64Imm()));
}
bool isSImm5() const { return isSImm<5>(); }
@@ -867,15 +843,14 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool IsValid;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
if (!IsConstantImm)
IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
else
IsValid = isInt<12>(fixImmediateForRV32(Imm, isRV64Imm()));
return IsValid &&
- ((IsConstantImm && VK == RISCVMCExpr::VK_None) ||
- VK == RISCVMCExpr::VK_LO || VK == RISCVMCExpr::VK_PCREL_LO ||
- VK == RISCVMCExpr::VK_TPREL_LO ||
+ (IsConstantImm || VK == RISCVMCExpr::VK_LO ||
+ VK == RISCVMCExpr::VK_PCREL_LO || VK == RISCVMCExpr::VK_TPREL_LO ||
VK == RISCVMCExpr::VK_TLSDESC_LOAD_LO ||
VK == RISCVMCExpr::VK_TLSDESC_ADD_LO);
}
@@ -900,40 +875,27 @@ struct RISCVOperand final : public MCParsedAsmOperand {
bool isUImm20LUI() const {
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
int64_t Imm;
- bool IsValid;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- if (!IsConstantImm) {
- IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
- return IsValid &&
- (VK == RISCVMCExpr::VK_HI || VK == RISCVMCExpr::VK_TPREL_HI);
- } else {
- return isUInt<20>(Imm) &&
- (VK == RISCVMCExpr::VK_None || VK == RISCVMCExpr::VK_HI ||
- VK == RISCVMCExpr::VK_TPREL_HI);
- }
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ if (IsConstantImm)
+ return isUInt<20>(Imm);
+ return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ (VK == RISCVMCExpr::VK_HI || VK == RISCVMCExpr::VK_TPREL_HI);
}
bool isUImm20AUIPC() const {
RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
int64_t Imm;
- bool IsValid;
if (!isImm())
return false;
- bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- if (!IsConstantImm) {
- IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
- return IsValid &&
- (VK == RISCVMCExpr::VK_PCREL_HI || VK == RISCVMCExpr::VK_GOT_HI ||
- VK == RISCVMCExpr::VK_TLS_GOT_HI ||
- VK == RISCVMCExpr::VK_TLS_GD_HI ||
- VK == RISCVMCExpr::VK_TLSDESC_HI);
- }
+ bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
+ if (IsConstantImm)
+ return isUInt<20>(Imm);
- return isUInt<20>(Imm) &&
- (VK == RISCVMCExpr::VK_None || VK == RISCVMCExpr::VK_PCREL_HI ||
- VK == RISCVMCExpr::VK_GOT_HI || VK == RISCVMCExpr::VK_TLS_GOT_HI ||
+ return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
+ (VK == RISCVMCExpr::VK_PCREL_HI || VK == RISCVMCExpr::VK_GOT_HI ||
+ VK == RISCVMCExpr::VK_TLS_GOT_HI ||
VK == RISCVMCExpr::VK_TLS_GD_HI ||
VK == RISCVMCExpr::VK_TLSDESC_HI);
}
@@ -1159,8 +1121,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
static void addExpr(MCInst &Inst, const MCExpr *Expr, bool IsRV64Imm) {
assert(Expr && "Expr shouldn't be null!");
int64_t Imm = 0;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
- bool IsConstant = evaluateConstantImm(Expr, Imm, VK);
+ bool IsConstant = evaluateConstantImm(Expr, Imm);
if (IsConstant)
Inst.addOperand(
@@ -1209,9 +1170,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
assert(N == 1 && "Invalid number of operands!");
int64_t Imm = 0;
if (Kind == KindTy::Immediate) {
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
- [[maybe_unused]] bool IsConstantImm =
- evaluateConstantImm(getImm(), Imm, VK);
+ [[maybe_unused]] bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
assert(IsConstantImm && "Invalid VTypeI Operand!");
} else {
Imm = getVType();
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
index e7c0f9501c1b0..41408c156b8a5 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
@@ -169,30 +169,3 @@ StringRef RISCVMCExpr::getSpecifierName(Specifier S) {
}
llvm_unreachable("Invalid ELF symbol kind");
}
-
-bool RISCVMCExpr::evaluateAsConstant(int64_t &Res) const {
- MCValue Value;
- if (specifier != VK_LO && specifier != VK_HI)
- return false;
-
- if (!getSubExpr()->evaluateAsRelocatable(Value, nullptr))
- return false;
-
- if (!Value.isAbsolute())
- return false;
-
- Res = evaluateAsInt64(Value.getConstant());
- return true;
-}
-
-int64_t RISCVMCExpr::evaluateAsInt64(int64_t Value) const {
- switch (specifier) {
- default:
- llvm_unreachable("Invalid kind");
- case VK_LO:
- return SignExtend64<12>(Value);
- case VK_HI:
- // Add 1 if bit 11 is 1, to compensate for low 12 bits being negative.
- return ((Value + 0x800) >> 12) & 0xfffff;
- }
-}
diff --git a/llvm/test/MC/RISCV/insn.s b/llvm/test/MC/RISCV/insn.s
index b1ef2511b96c6..7edde9ef451f3 100644
--- a/llvm/test/MC/RISCV/insn.s
+++ b/llvm/test/MC/RISCV/insn.s
@@ -146,12 +146,12 @@ target:
# CHECK-OBJ: fmadd.s fa0, fa1, fa2, fa3, rne
.insn r4 MADD, 0, 0, fa0, fa1, fa2, fa3
-# CHECK-ASM: .insn i 3, 5, t1, -2048(t2)
-# CHECK-ASM: encoding: [0x03,0xd3,0x03,0x80]
+# CHECK-ASM: .insn i 3, 5, t1, %lo(2048)(t2)
+# CHECK-ASM: encoding: [0x03,0xd3,0bAAAA0011,A]
# CHECK-OBJ: lhu t1, -0x800(t2)
.insn i 0x3, 0x5, x6, %lo(2048)(x7)
-# CHECK-ASM: .insn i 3, 5, t1, -2048(t2)
-# CHECK-ASM: encoding: [0x03,0xd3,0x03,0x80]
+# CHECK-ASM: .insn i 3, 5, t1, %lo(2048)(t2)
+# CHECK-ASM: encoding: [0x03,0xd3,0bAAAA0011,A]
# CHECK-OBJ: lhu t1, -0x800(t2)
.insn i LOAD, 0x5, x6, %lo(2048)(x7)
diff --git a/llvm/test/MC/RISCV/linker-relaxation.s b/llvm/test/MC/RISCV/linker-relaxation.s
index f9bffb697885f..6d0a05fb4267f 100644
--- a/llvm/test/MC/RISCV/linker-relaxation.s
+++ b/llvm/test/MC/RISCV/linker-relaxation.s
@@ -137,6 +137,7 @@ sb t1, %pcrel_lo(2b)(a2)
# RELAX-FIXUP: fixup A - offset: 0, value: %pcrel_lo(.Ltmp1), kind: fixup_riscv_pcrel_lo12_s
# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
+## %hi/%lo on an absolute symbol (not yet defined) leads to relocations when relaxation is enabled.
lui t2, %hi(abs)
# NORELAX-RELOC-NOT: R_RISCV_
# RELAX-RELOC: R_RISCV_HI20 - 0x12345
@@ -144,11 +145,20 @@ lui t2, %hi(abs)
# RELAX-FIXUP: fixup A - offset: 0, value: %hi(abs), kind: fixup_riscv_hi20
# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
+addi t2, t2, %lo(abs)
+# NORELAX-RELOC-NOT: R_RISCV_
+# RELAX-RELOC: R_RISCV_LO12_I - 0x12345
+# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
+# RELAX-FIXUP: fixup A - offset: 0, value: %lo(abs), kind: fixup_riscv_lo12_i
+# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
+
.set abs, 0x12345
lui t3, %hi(abs)
-# RELAX-RELOC-NOT: R_RISCV_
-# RELAX-FIXUP-NOT: fixup
+# RELAX-RELOC: R_RISCV_HI20 - 0x12345
+# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
+# RELAX-FIXUP: fixup A - offset: 0, value: %hi(74565), kind: fixup_riscv_hi20
+# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
# Check that a relocation is not emitted for a symbol
diff erence which has
# been folded to a fixup with an absolute value. This can happen when a
diff --git a/llvm/test/MC/RISCV/rv32i-aliases-valid.s b/llvm/test/MC/RISCV/rv32i-aliases-valid.s
index 43e29da0a38d8..d35fdccedf7f0 100644
--- a/llvm/test/MC/RISCV/rv32i-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rv32i-aliases-valid.s
@@ -83,8 +83,9 @@ li x12, 0x80000000
# CHECK-ALIAS: li a2, -1
li x12, 0xFFFFFFFF
-# CHECK-INST: addi a0, zero, 1110
-# CHECK-ALIAS: li a0, 1110
+# CHECK-ASM-NOALIAS: addi a0, zero, %lo(1193046)
+# CHECK-OBJ-NOALIAS: addi a0, zero, 1110
+# CHECK-ASM: addi a0, zero, %lo(1193046)
li a0, %lo(0x123456)
# CHECK-OBJ-NOALIAS: addi a0, zero, 0
diff --git a/llvm/test/MC/RISCV/rv64i-aliases-valid.s b/llvm/test/MC/RISCV/rv64i-aliases-valid.s
index b7029225be2ab..b3956c252447e 100644
--- a/llvm/test/MC/RISCV/rv64i-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rv64i-aliases-valid.s
@@ -192,8 +192,8 @@ li x13, 0xffffffff55555556
# CHECK-S-OBJ-NEXT: addi t0, t0, -1365
li x5, -2147485013
-# CHECK-INST: addi a0, zero, 1110
-# CHECK-ALIAS: li a0, 1110
+# CHECK-ASM: addi a0, zero, %lo(1193046)
+# CHECK-OBJ: addi a0, zero, %lo(1193046)
li a0, %lo(0x123456)
# CHECK-OBJ-NOALIAS: addi a0, zero, 0
diff --git a/llvm/test/MC/RISCV/rv64i-valid.s b/llvm/test/MC/RISCV/rv64i-valid.s
index 7f94fbf0b5f0b..4f056146e3fbb 100644
--- a/llvm/test/MC/RISCV/rv64i-valid.s
+++ b/llvm/test/MC/RISCV/rv64i-valid.s
@@ -15,8 +15,8 @@ lwu x2, +4(x3)
# CHECK-ASM-AND-OBJ: lwu tp, -2048(t0)
# CHECK-ASM: encoding: [0x03,0xe2,0x02,0x80]
lwu x4, -2048(x5)
-# CHECK-ASM-AND-OBJ: lwu t1, -2048(t2)
-# CHECK-ASM: encoding: [0x03,0xe3,0x03,0x80]
+# CHECK-ASM: lwu t1, %lo(2048)(t2) # encoding: [0x03,0xe3,0bAAAA0011,A]
+# CHECK-OBJ: lwu t1, -2048(t2)
lwu x6, %lo(2048)(x7)
# CHECK-ASM-AND-OBJ: lwu s0, 2047(s1)
# CHECK-ASM: encoding: [0x03,0xe4,0xf4,0x7f]
@@ -25,8 +25,8 @@ lwu x8, 2047(x9)
# CHECK-ASM-AND-OBJ: ld a0, -2048(a1)
# CHECK-ASM: encoding: [0x03,0xb5,0x05,0x80]
ld x10, -2048(x11)
-# CHECK-ASM-AND-OBJ: ld a2, -2048(a3)
-# CHECK-ASM: encoding: [0x03,0xb6,0x06,0x80]
+# CHECK-ASM: ld a2, %lo(2048)(a3) # encoding: [0x03,0xb6,0bAAAA0110,A]
+# CHECK-OBJ: ld a2, -2048(a3)
ld x12, %lo(2048)(x13)
# CHECK-ASM-AND-OBJ: ld a4, 2047(a5)
# CHECK-ASM: encoding: [0x03,0xb7,0xf7,0x7f]
@@ -35,8 +35,8 @@ ld x14, 2047(x15)
# CHECK-ASM-AND-OBJ: sd a6, -2048(a7)
# CHECK-ASM: encoding: [0x23,0xb0,0x08,0x81]
sd x16, -2048(x17)
-# CHECK-ASM-AND-OBJ: sd s2, -2048(s3)
-# CHECK-ASM: encoding: [0x23,0xb0,0x29,0x81]
+# CHECK-ASM: sd s2, %lo(2048)(s3) # encoding: [0x23'A',0xb0'A',0x29'A',0x01'A']
+# CHECK-OBJ: sd s2, -2048(s3)
sd x18, %lo(2048)(x19)
# CHECK-ASM-AND-OBJ: sd s4, 2047(s5)
# CHECK-ASM: encoding: [0xa3,0xbf,0x4a,0x7f]
diff --git a/llvm/test/MC/RISCV/rvd-valid.s b/llvm/test/MC/RISCV/rvd-valid.s
index 5135562352a0f..81abedd74c286 100644
--- a/llvm/test/MC/RISCV/rvd-valid.s
+++ b/llvm/test/MC/RISCV/rvd-valid.s
@@ -23,8 +23,8 @@ fld f1, +4(ra)
# CHECK-ASM-AND-OBJ: fld ft2, -2048(a3)
# CHECK-ASM: encoding: [0x07,0xb1,0x06,0x80]
fld f2, -2048(x13)
-# CHECK-ASM-AND-OBJ: fld ft3, -2048(s1)
-# CHECK-ASM: encoding: [0x87,0xb1,0x04,0x80]
+# CHECK-ASM: fld ft3, %lo(2048)(s1) # encoding: [0x87,0xb1,0bAAAA0100,A]
+# CHECK-OBJ: fld ft3, -2048(s1)
fld f3, %lo(2048)(s1)
# CHECK-ASM-AND-OBJ: fld ft4, 2047(s2)
# CHECK-ASM: encoding: [0x07,0x32,0xf9,0x7f]
@@ -39,8 +39,8 @@ fsd f6, 2047(s4)
# CHECK-ASM-AND-OBJ: fsd ft7, -2048(s5)
# CHECK-ASM: encoding: [0x27,0xb0,0x7a,0x80]
fsd f7, -2048(s5)
-# CHECK-ASM-AND-OBJ: fsd fs0, -2048(s6)
-# CHECK-ASM: encoding: [0x27,0x30,0x8b,0x80]
+# CHECK-ASM: fsd fs0, %lo(2048)(s6) # encoding: [0x27'A',0x30'A',0x8b'A',A]
+# CHECK-OBJ: fsd fs0, -2048(s6)
fsd f8, %lo(2048)(s6)
# CHECK-ASM-AND-OBJ: fsd fs1, 999(s7)
# CHECK-ASM: encoding: [0xa7,0xb3,0x9b,0x3e]
diff --git a/llvm/test/MC/RISCV/rvf-valid.s b/llvm/test/MC/RISCV/rvf-valid.s
index 49b67a0e9db94..54ecc9cb17dd9 100644
--- a/llvm/test/MC/RISCV/rvf-valid.s
+++ b/llvm/test/MC/RISCV/rvf-valid.s
@@ -18,8 +18,8 @@ flw f1, +4(ra)
# CHECK-ASM-AND-OBJ: flw ft2, -2048(a3)
# CHECK-ASM: encoding: [0x07,0xa1,0x06,0x80]
flw f2, -2048(x13)
-# CHECK-ASM-AND-OBJ: flw ft3, -2048(s1)
-# CHECK-ASM: encoding: [0x87,0xa1,0x04,0x80]
+# CHECK-ASM: flw ft3, %lo(2048)(s1) # encoding: [0x87,0xa1,0bAAAA0100,A]
+# CHECK-OBJ: flw ft3, -2048(s1)
flw f3, %lo(2048)(s1)
# CHECK-ASM-AND-OBJ: flw ft4, 2047(s2)
# CHECK-ASM: encoding: [0x07,0x22,0xf9,0x7f]
@@ -34,8 +34,8 @@ fsw f6, 2047(s4)
# CHECK-ASM-AND-OBJ: fsw ft7, -2048(s5)
# CHECK-ASM: encoding: [0x27,0xa0,0x7a,0x80]
fsw f7, -2048(s5)
-# CHECK-ASM-AND-OBJ: fsw fs0, -2048(s6)
-# CHECK-ASM: encoding: [0x27,0x20,0x8b,0x80]
+# CHECK-ASM: fsw fs0, %lo(2048)(s6) # encoding: [0x27'A',0x20'A',0x8b'A',A]
+# CHECK-OBJ: fsw fs0, -2048(s6)
fsw f8, %lo(2048)(s6)
# CHECK-ASM-AND-OBJ: fsw fs1, 999(s7)
# CHECK-ASM: encoding: [0xa7,0xa3,0x9b,0x3e]
diff --git a/llvm/test/MC/RISCV/rvi-valid.s b/llvm/test/MC/RISCV/rvi-valid.s
index 25b72d479bc6c..afe0c45956674 100644
--- a/llvm/test/MC/RISCV/rvi-valid.s
+++ b/llvm/test/MC/RISCV/rvi-valid.s
@@ -20,14 +20,15 @@ lui a0, 2
# CHECK-ASM-AND-OBJ: lui s11, 552960
# CHECK-ASM: encoding: [0xb7,0x0d,0x00,0x87]
lui s11, (0x87000000>>12)
-# CHECK-ASM-AND-OBJ: lui a0, 0
-# CHECK-ASM: encoding: [0x37,0x05,0x00,0x00]
+# CHECK-ASM: lui a0, %hi(2) # encoding: [0x37,0bAAAA0101,A,A]
+# CHECK-OBJ: lui a0, 0
lui a0, %hi(2)
# CHECK-ASM-AND-OBJ: lui s11, 552960
# CHECK-ASM: encoding: [0xb7,0x0d,0x00,0x87]
lui s11, (0x87000000>>12)
-# CHECK-ASM-AND-OBJ: lui s11, 552960
-# CHECK-ASM: encoding: [0xb7,0x0d,0x00,0x87]
+# CHECK-ASM: lui s11, %hi(2264924160)
+# CHECK-OBJ: lui s11, 552960
+# CHECK-ASM: encoding: [0xb7,0bAAAA1101,A,A]
lui s11, %hi(0x87000000)
# CHECK-ASM-AND-OBJ: lui t0, 1048575
# CHECK-ASM: encoding: [0xb7,0xf2,0xff,0xff]
@@ -35,8 +36,7 @@ lui t0, 1048575
# CHECK-ASM-AND-OBJ: lui gp, 0
# CHECK-ASM: encoding: [0xb7,0x01,0x00,0x00]
lui gp, 0
-# CHECK-ASM: lui a0, %hi(foo)
-# CHECK-ASM: encoding: [0x37,0bAAAA0101,A,A]
+# CHECK-ASM: lui a0, %hi(foo) # encoding: [0x37,0bAAAA0101,A,A]
# CHECK-OBJ: lui a0, 0
# CHECK-OBJ: R_RISCV_HI20 foo
lui a0, %hi(foo)
@@ -59,8 +59,7 @@ auipc t0, 1048575
# CHECK-ASM-AND-OBJ: auipc gp, 0
# CHECK-ASM: encoding: [0x97,0x01,0x00,0x00]
auipc gp, 0
-# CHECK-ASM: auipc a0, %pcrel_hi(foo)
-# CHECK-ASM: encoding: [0x17,0bAAAA0101,A,A]
+# CHECK-ASM: auipc a0, %pcrel_hi(foo) # encoding: [0x17,0bAAAA0101,A,A]
# CHECK-OBJ: auipc a0, 0
# CHECK-OBJ: R_RISCV_PCREL_HI20 foo
auipc a0, %pcrel_hi(foo)
@@ -104,8 +103,8 @@ jal zero, .
# CHECK-ASM-AND-OBJ: jalr a0, -2048(a1)
# CHECK-ASM: encoding: [0x67,0x85,0x05,0x80]
jalr a0, -2048(a1)
-# CHECK-ASM-AND-OBJ: jalr a0, -2048(a1)
-# CHECK-ASM: encoding: [0x67,0x85,0x05,0x80]
+# CHECK-ASM: jalr a0, %lo(2048)(a1) # encoding: [0x67,0x85,0bAAAA0101,A]
+# CHECK-OBJ: jalr a0, -2048(a1)
jalr a0, %lo(2048)(a1)
# CHECK-ASM-AND-OBJ: jalr t2, 2047(t1)
# CHECK-ASM: encoding: [0xe7,0x03,0xf3,0x7f]
@@ -162,8 +161,8 @@ lh t1, ~2047(zero)
# CHECK-ASM-AND-OBJ: lh t1, 0(zero)
# CHECK-ASM: encoding: [0x03,0x13,0x00,0x00]
lh t1, !1(zero)
-# CHECK-ASM-AND-OBJ: lh t1, -2048(zero)
-# CHECK-ASM: encoding: [0x03,0x13,0x00,0x80]
+# CHECK-ASM: lh t1, %lo(2048)(zero) # encoding: [0x03,0x13,0bAAAA0000,A]
+# CHECK-OBJ: lh t1, -2048(zero)
lh t1, %lo(2048)(zero)
# CHECK-ASM-AND-OBJ: lh sp, 2047(a0)
# CHECK-ASM: encoding: [0x03,0x11,0xf5,0x7f]
@@ -171,8 +170,7 @@ lh sp, 2047(a0)
# CHECK-ASM-AND-OBJ: lw a0, 97(a2)
# CHECK-ASM: encoding: [0x03,0x25,0x16,0x06]
lw a0, 97(a2)
-# CHECK-ASM: lbu s5, %lo(foo)(s6)
-# CHECK-ASM: encoding: [0x83,0x4a,0bAAAA1011,A]
+# CHECK-ASM: lbu s5, %lo(foo)(s6) # encoding: [0x83,0x4a,0bAAAA1011,A]
# CHECK-OBJ: lbu s5, 0(s6)
# CHECK-OBJ: R_RISCV_LO12
lbu s5, %lo(foo)(s6)
@@ -203,8 +201,9 @@ sh t3, ~2047(t5)
# CHECK-ASM-AND-OBJ: sh t3, 0(t5)
# CHECK-ASM: encoding: [0x23,0x10,0xcf,0x01]
sh t3, !1(t5)
-# CHECK-ASM-AND-OBJ: sh t3, -2048(t5)
-# CHECK-ASM: encoding: [0x23,0x10,0xcf,0x81]
+# CHECK-ASM: sh t3, %lo(2048)(t5)
+# CHECK-ASM: encoding: [0x23'A',0x10'A',0xcf'A',0x01'A']
+# CHECK-OBJ: sh t3, -2048(t5)
sh t3, %lo(2048)(t5)
# CHECK-ASM-AND-OBJ: sw ra, 999(zero)
# CHECK-ASM: encoding: [0xa3,0x23,0x10,0x3e]
@@ -254,8 +253,8 @@ ori a0, a1, ~2047
# CHECK-ASM-AND-OBJ: ori a0, a1, 0
# CHECK-ASM: encoding: [0x13,0xe5,0x05,0x00]
ori a0, a1, !1
-# CHECK-ASM-AND-OBJ: ori a0, a1, -2048
-# CHECK-ASM: encoding: [0x13,0xe5,0x05,0x80]
+# CHECK-ASM: ori a0, a1, %lo(2048) # encoding: [0x13,0xe5,0bAAAA0101,A]
+# CHECK-OBJ: ori a0, a1, -2048
ori a0, a1, %lo(2048)
# CHECK-ASM-AND-OBJ: andi ra, sp, 2047
# CHECK-ASM: encoding: [0x93,0x70,0xf1,0x7f]
diff --git a/llvm/test/MC/RISCV/rvzfbfmin-valid.s b/llvm/test/MC/RISCV/rvzfbfmin-valid.s
index 6bca69175b83c..72cc3f4074739 100644
--- a/llvm/test/MC/RISCV/rvzfbfmin-valid.s
+++ b/llvm/test/MC/RISCV/rvzfbfmin-valid.s
@@ -18,8 +18,8 @@ flh f1, +4(ra)
# CHECK-ASM-AND-OBJ: flh ft2, -2048(a3)
# CHECK-ASM: encoding: [0x07,0x91,0x06,0x80]
flh f2, -2048(x13)
-# CHECK-ASM-AND-OBJ: flh ft3, -2048(s1)
-# CHECK-ASM: encoding: [0x87,0x91,0x04,0x80]
+# CHECK-ASM: flh ft3, %lo(2048)(s1) # encoding: [0x87,0x91,0bAAAA0100,A]
+# CHECK-OBJ: flh ft3, -2048(s1)
flh f3, %lo(2048)(s1)
# CHECK-ASM-AND-OBJ: flh ft4, 2047(s2)
# CHECK-ASM: encoding: [0x07,0x12,0xf9,0x7f]
@@ -34,8 +34,8 @@ fsh f6, 2047(s4)
# CHECK-ASM-AND-OBJ: fsh ft7, -2048(s5)
# CHECK-ASM: encoding: [0x27,0x90,0x7a,0x80]
fsh f7, -2048(s5)
-# CHECK-ASM-AND-OBJ: fsh fs0, -2048(s6)
-# CHECK-ASM: encoding: [0x27,0x10,0x8b,0x80]
+# CHECK-ASM: fsh fs0, %lo(2048)(s6) # encoding: [0x27'A',0x10'A',0x8b'A',A]
+# CHECK-OBJ: fsh fs0, -2048(s6)
fsh f8, %lo(2048)(s6)
# CHECK-ASM-AND-OBJ: fsh fs1, 999(s7)
# CHECK-ASM: encoding: [0xa7,0x93,0x9b,0x3e]
diff --git a/llvm/test/MC/RISCV/rvzfh-valid.s b/llvm/test/MC/RISCV/rvzfh-valid.s
index ccc6d10188de2..e5d4293745da7 100644
--- a/llvm/test/MC/RISCV/rvzfh-valid.s
+++ b/llvm/test/MC/RISCV/rvzfh-valid.s
@@ -18,8 +18,8 @@ flh f1, +4(ra)
# CHECK-ASM-AND-OBJ: flh ft2, -2048(a3)
# CHECK-ASM: encoding: [0x07,0x91,0x06,0x80]
flh f2, -2048(x13)
-# CHECK-ASM-AND-OBJ: flh ft3, -2048(s1)
-# CHECK-ASM: encoding: [0x87,0x91,0x04,0x80]
+# CHECK-ASM: flh ft3, %lo(2048)(s1) # encoding: [0x87,0x91,0bAAAA0100,A]
+# CHECK-OBJ: flh ft3, -2048(s1)
flh f3, %lo(2048)(s1)
# CHECK-ASM-AND-OBJ: flh ft4, 2047(s2)
# CHECK-ASM: encoding: [0x07,0x12,0xf9,0x7f]
@@ -34,8 +34,8 @@ fsh f6, 2047(s4)
# CHECK-ASM-AND-OBJ: fsh ft7, -2048(s5)
# CHECK-ASM: encoding: [0x27,0x90,0x7a,0x80]
fsh f7, -2048(s5)
-# CHECK-ASM-AND-OBJ: fsh fs0, -2048(s6)
-# CHECK-ASM: encoding: [0x27,0x10,0x8b,0x80]
+# CHECK-ASM: fsh fs0, %lo(2048)(s6) # encoding: [0x27'A',0x10'A',0x8b'A',A]
+# CHECK-OBJ: fsh fs0, -2048(s6)
fsh f8, %lo(2048)(s6)
# CHECK-ASM-AND-OBJ: fsh fs1, 999(s7)
# CHECK-ASM: encoding: [0xa7,0x93,0x9b,0x3e]
diff --git a/llvm/test/MC/RISCV/rvzfhmin-valid.s b/llvm/test/MC/RISCV/rvzfhmin-valid.s
index fd7b36a58734f..43848c0c3d74a 100644
--- a/llvm/test/MC/RISCV/rvzfhmin-valid.s
+++ b/llvm/test/MC/RISCV/rvzfhmin-valid.s
@@ -18,8 +18,8 @@ flh f1, +4(ra)
# CHECK-ASM-AND-OBJ: flh ft2, -2048(a3)
# CHECK-ASM: encoding: [0x07,0x91,0x06,0x80]
flh f2, -2048(x13)
-# CHECK-ASM-AND-OBJ: flh ft3, -2048(s1)
-# CHECK-ASM: encoding: [0x87,0x91,0x04,0x80]
+# CHECK-ASM: flh ft3, %lo(2048)(s1) # encoding: [0x87,0x91,0bAAAA0100,A]
+# CHECK-OBJ: flh ft3, -2048(s1)
flh f3, %lo(2048)(s1)
# CHECK-ASM-AND-OBJ: flh ft4, 2047(s2)
# CHECK-ASM: encoding: [0x07,0x12,0xf9,0x7f]
@@ -34,8 +34,8 @@ fsh f6, 2047(s4)
# CHECK-ASM-AND-OBJ: fsh ft7, -2048(s5)
# CHECK-ASM: encoding: [0x27,0x90,0x7a,0x80]
fsh f7, -2048(s5)
-# CHECK-ASM-AND-OBJ: fsh fs0, -2048(s6)
-# CHECK-ASM: encoding: [0x27,0x10,0x8b,0x80]
+# CHECK-ASM: fsh fs0, %lo(2048)(s6) # encoding: [0x27'A',0x10'A',0x8b'A',A]
+# CHECK-OBJ: fsh fs0, -2048(s6)
fsh f8, %lo(2048)(s6)
# CHECK-ASM-AND-OBJ: fsh fs1, 999(s7)
# CHECK-ASM: encoding: [0xa7,0x93,0x9b,0x3e]
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