[llvm] [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (PR #133554)

[Afanasyev Ivan via llvm-commits]

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@@ -690,6 +717,13 @@ void SSAIfConv::convertIf(SmallVectorImpl<MachineBasicBlock *> &RemoveBlocks,
   else
     ++NumDiamondsConv;
 
+  // If both blocks are going to be merged into Head, remove "killed" flag from
+  // registers, which are killed in TBB and FBB. Otherwise, register will be
+  // killed twice in Head after splice. Double killed register is an incorrect
+  // MIR.
+  if (TBB != Tail && FBB != Tail)
+    clearDoubleKillFlags(TBB, FBB);
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ivafanas wrote:

I like your idea more than my original one.
Implementation is updated to conform your proposal.

Done.

https://github.com/llvm/llvm-project/pull/133554