[llvm] 1c7ab39 - MIPS: Set EnableLoopTermFold (#133454)
via llvm-commits
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Sat Mar 29 06:52:03 PDT 2025
Author: YunQiang Su
Date: 2025-03-29T21:51:59+08:00
New Revision: 1c7ab39f3d6959c64d01c8f275d672bd56315155
URL: https://github.com/llvm/llvm-project/commit/1c7ab39f3d6959c64d01c8f275d672bd56315155
DIFF: https://github.com/llvm/llvm-project/commit/1c7ab39f3d6959c64d01c8f275d672bd56315155.diff
LOG: MIPS: Set EnableLoopTermFold (#133454)
Setting `EnableLoopTermFold` enables `loop-term-fold` pass.
Added:
llvm/test/Transforms/LoopStrengthReduce/Mips/lit.local.cfg
Modified:
llvm/lib/Target/Mips/MipsTargetMachine.cpp
llvm/test/CodeGen/Mips/brdelayslot.ll
llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 30eb739212113..4d1bcb17e2fb5 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -233,6 +233,7 @@ class MipsPassConfig : public TargetPassConfig {
// can break this requirement, so disable it when long branch pass is
// enabled.
EnableTailMerge = !getMipsSubtarget().enableLongBranchPass();
+ EnableLoopTermFold = true;
}
MipsTargetMachine &getMipsTargetMachine() const {
diff --git a/llvm/test/CodeGen/Mips/brdelayslot.ll b/llvm/test/CodeGen/Mips/brdelayslot.ll
index 79205373d4566..da14564b77e64 100644
--- a/llvm/test/CodeGen/Mips/brdelayslot.ll
+++ b/llvm/test/CodeGen/Mips/brdelayslot.ll
@@ -134,9 +134,12 @@ declare void @foo11()
;
; SUCCBB-LABEL: succbbs_loop1:
; SUCCBB: blez $5, $BB
-; SUCCBB-NEXT: addiu
-; SUCCBB: bnez ${{[0-9]+}}, $BB
-; SUCCBB-NEXT: addiu
+; SUCCBB-NEXT: sll
+; SUCCBB-NEXT: # %bb
+; SUCCBB-NEXT: addu
+; SUCCBB: addiu ${{[0-9]+}}, ${{[0-9]+}}, 4
+; SUCCBB-NEXT: bne ${{[0-9]+}}, ${{[0-9]+}}, $BB
+; SUCCBB-NEXT: nop
define i32 @succbbs_loop1(ptr nocapture %a, i32 %n) {
entry:
diff --git a/llvm/test/Transforms/LoopStrengthReduce/Mips/lit.local.cfg b/llvm/test/Transforms/LoopStrengthReduce/Mips/lit.local.cfg
new file mode 100644
index 0000000000000..b997811996b31
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/Mips/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "Mips" in config.root.targets:
+ config.unsupported = True
diff --git a/llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll b/llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
index 9f562451bd40a..2a40797540cb1 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/Mips/long-array-initialize.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt < %s -passes=loop-reduce -S | FileCheck %s
+; RUN: opt < %s -passes=loop-reduce,loop-term-fold -S | FileCheck %s --check-prefix=CHECK-OPT
+; RUN: llc < %s -o - | FileCheck %s --check-prefix=CHECK-LLC
target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
target triple = "mips-unknown-linux-gnu"
@@ -8,20 +9,34 @@ target triple = "mips-unknown-linux-gnu"
; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none)
define dso_local void @in128000(i32 noundef signext %k, i32 noundef signext %n) local_unnamed_addr #0 {
-; CHECK-LABEL: define dso_local void @in128000(
-; CHECK-SAME: i32 noundef signext [[K:%.*]], i32 noundef signext [[N:%.*]]) local_unnamed_addr {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_COND_CLEANUP:.*]]:
-; CHECK-NEXT: ret void
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP:%.*]], %[[FOR_BODY]] ], [ @x, %[[ENTRY]] ]
-; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ 128000, %[[ENTRY]] ]
-; CHECK-NEXT: store i32 [[K]], ptr [[LSR_IV1]], align 4
-; CHECK-NEXT: [[LSR_IV_NEXT]] = add nsw i32 [[LSR_IV]], -1
-; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV1]], i32 4
-; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+; CHECK-LLC-LABEL: in128000:
+; CHECK-LLC: # %bb.0: # %entry
+; CHECK-LLC-NEXT: lui $1, %hi(x)
+; CHECK-LLC-NEXT: addiu $2, $1, %lo(x)
+; CHECK-LLC-NEXT: lui $1, 7
+; CHECK-LLC-NEXT: ori $1, $1, 53248
+; CHECK-LLC-NEXT: addu $3, $2, $1
+; CHECK-LLC-NEXT: $BB0_1: # %for.body
+; CHECK-LLC-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-LLC-NEXT: sw $4, 0($2)
+; CHECK-LLC-NEXT: addiu $2, $2, 4
+; CHECK-LLC-NEXT: bne $2, $3, $BB0_1
+; CHECK-LLC-NEXT: nop
+; CHECK-LLC-NEXT: # %bb.2: # %for.cond.cleanup
+; CHECK-LLC-NEXT: jr $ra
+; CHECK-LLC-NEXT: nop
+; CHECK-OPT-LABEL: define dso_local void @in128000(
+; CHECK-OPT-SAME: i32 noundef signext [[K:%.*]], i32 noundef signext [[N:%.*]]) local_unnamed_addr {
+; CHECK-OPT-NEXT: [[ENTRY:.*]]:
+; CHECK-OPT-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-OPT: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-OPT-NEXT: ret void
+; CHECK-OPT: [[FOR_BODY]]:
+; CHECK-OPT-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP:%.*]], %[[FOR_BODY]] ], [ @x, %[[ENTRY]] ]
+; CHECK-OPT-NEXT: store i32 [[K]], ptr [[LSR_IV1]], align 4
+; CHECK-OPT-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV1]], i32 4
+; CHECK-OPT-NEXT: [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND:%.*]] = icmp eq ptr [[SCEVGEP]], getelementptr inbounds nuw (i8, ptr @x, i32 512000)
+; CHECK-OPT-NEXT: br i1 [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
;
entry:
br label %for.body
@@ -40,20 +55,32 @@ for.body: ; preds = %entry, %for.body
; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none)
define dso_local void @in1000(i32 noundef signext %k, i32 noundef signext %n) local_unnamed_addr #0 {
-; CHECK-LABEL: define dso_local void @in1000(
-; CHECK-SAME: i32 noundef signext [[K:%.*]], i32 noundef signext [[N:%.*]]) local_unnamed_addr {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_COND_CLEANUP:.*]]:
-; CHECK-NEXT: ret void
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP:%.*]], %[[FOR_BODY]] ], [ @x, %[[ENTRY]] ]
-; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ 1000, %[[ENTRY]] ]
-; CHECK-NEXT: store i32 [[K]], ptr [[LSR_IV1]], align 4
-; CHECK-NEXT: [[LSR_IV_NEXT]] = add nsw i32 [[LSR_IV]], -1
-; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV1]], i32 4
-; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+; CHECK-LLC-LABEL: in1000:
+; CHECK-LLC: # %bb.0: # %entry
+; CHECK-LLC-NEXT: lui $1, %hi(x)
+; CHECK-LLC-NEXT: addiu $2, $1, %lo(x)
+; CHECK-LLC-NEXT: addiu $3, $2, 4000
+; CHECK-LLC-NEXT: $BB1_1: # %for.body
+; CHECK-LLC-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-LLC-NEXT: sw $4, 0($2)
+; CHECK-LLC-NEXT: addiu $2, $2, 4
+; CHECK-LLC-NEXT: bne $2, $3, $BB1_1
+; CHECK-LLC-NEXT: nop
+; CHECK-LLC-NEXT: # %bb.2: # %for.cond.cleanup
+; CHECK-LLC-NEXT: jr $ra
+; CHECK-LLC-NEXT: nop
+; CHECK-OPT-LABEL: define dso_local void @in1000(
+; CHECK-OPT-SAME: i32 noundef signext [[K:%.*]], i32 noundef signext [[N:%.*]]) local_unnamed_addr {
+; CHECK-OPT-NEXT: [[ENTRY:.*]]:
+; CHECK-OPT-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-OPT: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-OPT-NEXT: ret void
+; CHECK-OPT: [[FOR_BODY]]:
+; CHECK-OPT-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP:%.*]], %[[FOR_BODY]] ], [ @x, %[[ENTRY]] ]
+; CHECK-OPT-NEXT: store i32 [[K]], ptr [[LSR_IV1]], align 4
+; CHECK-OPT-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV1]], i32 4
+; CHECK-OPT-NEXT: [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND:%.*]] = icmp eq ptr [[SCEVGEP]], getelementptr inbounds nuw (i8, ptr @x, i32 4000)
+; CHECK-OPT-NEXT: br i1 [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
;
entry:
br label %for.body
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