[llvm] [AArch64] Custom lower v4i8 subreg extract. (PR #133438)

[Benjamin Maxwell via llvm-commits]

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@@ -7166,7 +7166,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
 
   // if (and x, c) is known to be zero, return 0
   unsigned BitWidth = VT.getScalarSizeInBits();
-  ConstantSDNode *N1C = isConstOrConstSplat(N1);
+  ConstantSDNode *N1C = isConstOrConstSplat(N1, false, true);
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MacDue wrote:

nit: I find it helpful to label `bool` parameters.
```suggestion
  ConstantSDNode *N1C = isConstOrConstSplat(N1, /*AllowUndefs=*/false, /*AllowTruncation=*/true);
```

https://github.com/llvm/llvm-project/pull/133438