[clang] [llvm] [RISC-V] extra andi instruction when loading a bool atomically #131476 (PR #133406)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 28 08:29:35 PDT 2025
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/133406 at github.com>
topperc wrote:
This should be two different PRs. One for clang and one for the RISCV backend. The reviewers for each area are different.
https://github.com/llvm/llvm-project/pull/133406
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