[llvm] a6e61ce - [RISCV] Remove duplicate check in SelectAddrRegImmLsb00000. NFC (#133372)

via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 28 00:10:02 PDT 2025


Author: Sudharsan Veeravalli
Date: 2025-03-28T12:39:59+05:30
New Revision: a6e61ce2391f46cfe97de3a4986a5ed8fdb3b8db

URL: https://github.com/llvm/llvm-project/commit/a6e61ce2391f46cfe97de3a4986a5ed8fdb3b8db
DIFF: https://github.com/llvm/llvm-project/commit/a6e61ce2391f46cfe97de3a4986a5ed8fdb3b8db.diff

LOG: [RISCV] Remove duplicate check in SelectAddrRegImmLsb00000. NFC (#133372)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 0268d4f34480d..2d07a66ff275e 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -2809,8 +2809,7 @@ bool RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(SDValue Addr, SDValue &Base,
   // Handle ADD with large immediates.
   if (Addr.getOpcode() == ISD::ADD && isa<ConstantSDNode>(Addr.getOperand(1))) {
     int64_t CVal = cast<ConstantSDNode>(Addr.getOperand(1))->getSExtValue();
-    assert(!(isInt<12>(CVal) && isInt<12>(CVal)) &&
-           "simm12 not already handled?");
+    assert(!isInt<12>(CVal) && "simm12 not already handled?");
 
     // Handle immediates in the range [-4096,-2049] or [2017, 4065]. We can save
     // one instruction by folding adjustment (-2048 or 2016) into the address.


        


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