[llvm] [RISCV] Disable i1 fixed vectors with more than 1024 elements. (PR #133267)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 27 08:27:50 PDT 2025
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/133267
v2048i1 is an MVT, but v2048i8 is not so we don't support i8 vectors with more than 1024 elements. Lowering a v2048i1 shufflevector would requires promoting to v2048i8. Since v2048i8 isn't legal and isn't an MVT this leads to a crash.
To fix the crash, this patch makes v2048i1 an illegal type.
>From a0e188265ade2a457ed515dea07e8c5031bc2543 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 27 Mar 2025 08:11:41 -0700
Subject: [PATCH] [RISCV] Disable i1 fixed vectors with more than 1024
elements.
v2048i1 is an MVT, but v2048i8 is not so we don't support i8 vectors
with more than 1024 elements. Lowering a v2048i1 shufflevector
would requires promoting to v2048i8. Since v2048i8 isn't legal and
isn't an MVT this leads to a crash.
To fix the crash, this patch makes v2048i1 an illegal type.
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +-
llvm/test/CodeGen/RISCV/rvv/pr133217.ll | 19477 ++++++++++++++++++
2 files changed, 19478 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/RISCV/rvv/pr133217.ll
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 5b5dca4b541df..97186496a97f4 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2631,7 +2631,7 @@ static bool useRVVForFixedLengthVectorVT(MVT VT,
// across all supported vector element types to avoid legalization issues.
// Therefore -- since the largest is v1024i8/v512i16/etc -- the largest
// fixed-length vector type we support is 1024 bytes.
- if (VT.getFixedSizeInBits() > 1024 * 8)
+ if (VT.getVectorNumElements() > 1024 || VT.getFixedSizeInBits() > 1024 * 8)
return false;
unsigned MinVLen = Subtarget.getRealMinVLen();
diff --git a/llvm/test/CodeGen/RISCV/rvv/pr133217.ll b/llvm/test/CodeGen/RISCV/rvv/pr133217.ll
new file mode 100644
index 0000000000000..dd81a84135069
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/pr133217.ll
@@ -0,0 +1,19477 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zvl2048b | FileCheck %s
+
+define <2048 x i1> @foo(<1024 x i1> %x, <1024 x i1> %y) {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi sp, sp, -2032
+; CHECK-NEXT: .cfi_def_cfa_offset 2032
+; CHECK-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s2, 2008(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s3, 2000(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s4, 1992(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s5, 1984(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s6, 1976(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s7, 1968(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s8, 1960(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s9, 1952(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s10, 1944(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd s11, 1936(sp) # 8-byte Folded Spill
+; CHECK-NEXT: .cfi_offset ra, -8
+; CHECK-NEXT: .cfi_offset s0, -16
+; CHECK-NEXT: .cfi_offset s2, -24
+; CHECK-NEXT: .cfi_offset s3, -32
+; CHECK-NEXT: .cfi_offset s4, -40
+; CHECK-NEXT: .cfi_offset s5, -48
+; CHECK-NEXT: .cfi_offset s6, -56
+; CHECK-NEXT: .cfi_offset s7, -64
+; CHECK-NEXT: .cfi_offset s8, -72
+; CHECK-NEXT: .cfi_offset s9, -80
+; CHECK-NEXT: .cfi_offset s10, -88
+; CHECK-NEXT: .cfi_offset s11, -96
+; CHECK-NEXT: addi s0, sp, 2032
+; CHECK-NEXT: .cfi_def_cfa s0, 0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1040
+; CHECK-NEXT: sub sp, sp, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: sub sp, sp, a0
+; CHECK-NEXT: andi sp, sp, -1024
+; CHECK-NEXT: li s2, 1024
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: add a5, sp, a0
+; CHECK-NEXT: li a0, 3
+; CHECK-NEXT: slli a0, a0, 11
+; CHECK-NEXT: add t2, sp, a0
+; CHECK-NEXT: li s11, 127
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2040
+; CHECK-NEXT: add a7, sp, a0
+; CHECK-NEXT: li s10, 126
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2032
+; CHECK-NEXT: add t3, sp, a0
+; CHECK-NEXT: li s9, 125
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2024
+; CHECK-NEXT: add a2, sp, a0
+; CHECK-NEXT: li s8, 124
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2016
+; CHECK-NEXT: add t1, sp, a0
+; CHECK-NEXT: li s7, 123
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2008
+; CHECK-NEXT: add a3, sp, a0
+; CHECK-NEXT: li s6, 122
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 2000
+; CHECK-NEXT: add t0, sp, a0
+; CHECK-NEXT: li s5, 121
+; CHECK-NEXT: li s4, 120
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1984
+; CHECK-NEXT: add a4, sp, a0
+; CHECK-NEXT: li s3, 119
+; CHECK-NEXT: li t6, 118
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1968
+; CHECK-NEXT: add a6, sp, a0
+; CHECK-NEXT: li t5, 117
+; CHECK-NEXT: li t4, 116
+; CHECK-NEXT: vsetvli zero, s2, e8, m4, ta, ma
+; CHECK-NEXT: vmv.v.i v16, 0
+; CHECK-NEXT: vmerge.vim v12, v16, 1, v0
+; CHECK-NEXT: vse8.v v12, (a5)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1952
+; CHECK-NEXT: add a1, sp, a0
+; CHECK-NEXT: vmv1r.v v0, v8
+; CHECK-NEXT: vmerge.vim v8, v16, 1, v0
+; CHECK-NEXT: vse8.v v8, (t2)
+; CHECK-NEXT: li a0, 115
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vslidedown.vx v10, v12, s11
+; CHECK-NEXT: vslidedown.vx v11, v8, s11
+; CHECK-NEXT: lui a5, 1
+; CHECK-NEXT: addiw a5, a5, 1944
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: vslidedown.vx v25, v12, s10
+; CHECK-NEXT: vslidedown.vx v14, v8, s10
+; CHECK-NEXT: li s10, 114
+; CHECK-NEXT: vslidedown.vx v26, v12, s9
+; CHECK-NEXT: vslidedown.vx v15, v8, s9
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: addiw t2, t2, 1936
+; CHECK-NEXT: add s2, sp, t2
+; CHECK-NEXT: vslidedown.vx v27, v12, s8
+; CHECK-NEXT: vslidedown.vx v16, v8, s8
+; CHECK-NEXT: li s8, 113
+; CHECK-NEXT: vslidedown.vx v28, v12, s7
+; CHECK-NEXT: vslidedown.vx v17, v8, s7
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: addiw t2, t2, 1928
+; CHECK-NEXT: add s7, sp, t2
+; CHECK-NEXT: vslidedown.vx v29, v12, s6
+; CHECK-NEXT: vslidedown.vx v18, v8, s6
+; CHECK-NEXT: li s6, 112
+; CHECK-NEXT: vslidedown.vx v30, v12, s5
+; CHECK-NEXT: vslidedown.vx v19, v8, s5
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: addiw t2, t2, 1920
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: vslidedown.vx v31, v12, s4
+; CHECK-NEXT: vslidedown.vx v20, v8, s4
+; CHECK-NEXT: li s4, 111
+; CHECK-NEXT: vslidedown.vx v7, v12, s3
+; CHECK-NEXT: vslidedown.vx v21, v8, s3
+; CHECK-NEXT: vslidedown.vx v6, v12, t6
+; CHECK-NEXT: vslidedown.vx v22, v8, t6
+; CHECK-NEXT: li s11, 110
+; CHECK-NEXT: vslidedown.vx v5, v12, t5
+; CHECK-NEXT: vslidedown.vx v23, v8, t5
+; CHECK-NEXT: lui t5, 1
+; CHECK-NEXT: addiw t5, t5, 1904
+; CHECK-NEXT: add s5, sp, t5
+; CHECK-NEXT: vslidedown.vx v4, v12, t4
+; CHECK-NEXT: vslidedown.vx v24, v8, t4
+; CHECK-NEXT: li ra, 109
+; CHECK-NEXT: vse8.v v10, (a7)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 1896
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: vse8.v v25, (t3)
+; CHECK-NEXT: li t6, 108
+; CHECK-NEXT: vslidedown.vx v3, v12, a0
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1888
+; CHECK-NEXT: add t3, sp, a0
+; CHECK-NEXT: vse8.v v26, (a2)
+; CHECK-NEXT: li t4, 107
+; CHECK-NEXT: vse8.v v27, (t1)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1880
+; CHECK-NEXT: add a2, sp, a0
+; CHECK-NEXT: vslidedown.vx v2, v12, s10
+; CHECK-NEXT: vslidedown.vx v25, v8, s10
+; CHECK-NEXT: li t1, 106
+; CHECK-NEXT: vse8.v v28, (a3)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1872
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (t0)
+; CHECK-NEXT: vslidedown.vx v1, v12, s8
+; CHECK-NEXT: vslidedown.vx v26, v8, s8
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 2041
+; CHECK-NEXT: add t0, sp, a3
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 1992
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: vse8.v v30, (a3)
+; CHECK-NEXT: vse8.v v31, (a4)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 2033
+; CHECK-NEXT: add s9, sp, a3
+; CHECK-NEXT: vslidedown.vx v31, v12, s6
+; CHECK-NEXT: vslidedown.vx v27, v8, s6
+; CHECK-NEXT: li t5, 381
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 1976
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: vse8.v v7, (a3)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 2025
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: vse8.v v6, (a6)
+; CHECK-NEXT: li s3, 380
+; CHECK-NEXT: vslidedown.vx v7, v12, s4
+; CHECK-NEXT: vslidedown.vx v28, v8, s4
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: addiw a4, a4, 2017
+; CHECK-NEXT: add a6, sp, a4
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: addiw a4, a4, 1960
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: vse8.v v5, (a4)
+; CHECK-NEXT: li a4, 379
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: addiw a1, a1, 2009
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vslidedown.vx v6, v12, s11
+; CHECK-NEXT: vslidedown.vx v29, v8, s11
+; CHECK-NEXT: li s10, 378
+; CHECK-NEXT: vse8.v v3, (a5)
+; CHECK-NEXT: lui a5, 1
+; CHECK-NEXT: addiw a5, a5, 2001
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: vse8.v v2, (s2)
+; CHECK-NEXT: li s8, 377
+; CHECK-NEXT: vslidedown.vx v5, v12, ra
+; CHECK-NEXT: vslidedown.vx v30, v8, ra
+; CHECK-NEXT: lui s2, 1
+; CHECK-NEXT: addiw s2, s2, 1993
+; CHECK-NEXT: add s2, sp, s2
+; CHECK-NEXT: vse8.v v1, (s7)
+; CHECK-NEXT: li s7, 376
+; CHECK-NEXT: vse8.v v31, (t2)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: addiw t2, t2, 1985
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: vslidedown.vx v4, v12, t6
+; CHECK-NEXT: vslidedown.vx v31, v8, t6
+; CHECK-NEXT: li s6, 375
+; CHECK-NEXT: lui t6, 1
+; CHECK-NEXT: addiw t6, t6, 1912
+; CHECK-NEXT: add t6, sp, t6
+; CHECK-NEXT: vse8.v v7, (t6)
+; CHECK-NEXT: lui t6, 1
+; CHECK-NEXT: addiw t6, t6, 1977
+; CHECK-NEXT: add t6, sp, t6
+; CHECK-NEXT: vse8.v v6, (s5)
+; CHECK-NEXT: li s5, 374
+; CHECK-NEXT: vslidedown.vx v3, v12, t4
+; CHECK-NEXT: vslidedown.vx v7, v8, t4
+; CHECK-NEXT: lui t4, 1
+; CHECK-NEXT: addiw t4, t4, 1969
+; CHECK-NEXT: add t4, sp, t4
+; CHECK-NEXT: vse8.v v5, (a7)
+; CHECK-NEXT: li s4, 373
+; CHECK-NEXT: vse8.v v4, (t3)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 1961
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: vslidedown.vx v5, v12, t1
+; CHECK-NEXT: vslidedown.vx v6, v8, t1
+; CHECK-NEXT: li t3, 372
+; CHECK-NEXT: vse8.v v3, (a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: addiw a2, a2, 1953
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li t1, 371
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 383
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (t0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1945
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li t0, 382
+; CHECK-NEXT: vslidedown.vx v4, v12, t0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (s9)
+; CHECK-NEXT: li t0, 370
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t5
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a3)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: addiw a3, a3, 1937
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s3
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a6)
+; CHECK-NEXT: li t5, 369
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: addiw a1, a1, 1929
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s10
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a5)
+; CHECK-NEXT: li s3, 368
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s8
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (s2)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: addiw a4, a4, 1921
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (t2)
+; CHECK-NEXT: li t2, 367
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s6
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (t6)
+; CHECK-NEXT: lui a5, 1
+; CHECK-NEXT: addiw a5, a5, 1913
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s5
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (t4)
+; CHECK-NEXT: li t4, 366
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a7)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: addiw a6, a6, 1905
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t3
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a2)
+; CHECK-NEXT: li a7, 365
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1897
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a3)
+; CHECK-NEXT: li a3, 364
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t5
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: addiw a1, a1, 1889
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, s3
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a4)
+; CHECK-NEXT: li a4, 363
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t2
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: addiw a2, a2, 1881
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, t4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a6)
+; CHECK-NEXT: li a5, 362
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1873
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a3
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: li a3, 361
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: addiw a1, a1, 1865
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a5
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a2, 360
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a3
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1857
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a2
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 359
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1849
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 358
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1841
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 357
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1833
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 356
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1825
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 355
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1817
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 354
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1809
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 353
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1801
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 352
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1793
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 351
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1785
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 350
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1777
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 349
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1769
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 348
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1761
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 347
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1753
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 346
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1745
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 345
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1737
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 344
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1729
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 343
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1721
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 342
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1713
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 341
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1705
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 340
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1697
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 339
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1689
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 338
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1681
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 337
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1673
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 336
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1665
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 335
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1657
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 334
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1649
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 333
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1641
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 332
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1633
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 331
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1625
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 330
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1617
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 329
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1609
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 328
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1601
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 327
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1593
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 326
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1585
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 325
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1577
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 324
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1569
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 323
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1561
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 322
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1553
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 321
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1545
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 320
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1537
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 319
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1529
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 318
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1521
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 317
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1513
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 316
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1505
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 315
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1497
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 314
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1489
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 313
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1481
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 312
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1473
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 311
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1465
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 310
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1457
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 309
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1449
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 308
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1441
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 307
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1433
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 306
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1425
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 305
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1417
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 304
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1409
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 303
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1401
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 302
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1393
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 301
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1385
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 300
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1377
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 299
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1369
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 298
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1361
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 297
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1353
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 296
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1345
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 295
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1337
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 294
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1329
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 293
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1321
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 292
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1313
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 291
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1305
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 290
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1297
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 289
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1289
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 288
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1281
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 287
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1273
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 286
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1265
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 285
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1257
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 284
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1249
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 283
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1241
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 282
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1233
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 281
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1225
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 280
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1217
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 279
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1209
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 278
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1201
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 277
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1193
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 276
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1185
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 275
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1177
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 274
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1169
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 273
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1161
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 272
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1153
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 271
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1145
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 270
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1137
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 269
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1129
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 268
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1121
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 267
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1113
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 266
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1105
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 265
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1097
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 264
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1089
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 263
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1081
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 262
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1073
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 261
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1065
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 260
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1057
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 259
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1049
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 258
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1041
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 257
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1033
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 256
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1025
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 105
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1864
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 104
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1856
+; CHECK-NEXT: add a1, sp, a0
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: li a1, 103
+; CHECK-NEXT: vslidedown.vx v4, v12, a1
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1848
+; CHECK-NEXT: add a2, sp, a0
+; CHECK-NEXT: vse8.v v4, (a2)
+; CHECK-NEXT: li a2, 102
+; CHECK-NEXT: vslidedown.vx v4, v12, a2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1840
+; CHECK-NEXT: add a3, sp, a0
+; CHECK-NEXT: vse8.v v4, (a3)
+; CHECK-NEXT: li a3, 101
+; CHECK-NEXT: vslidedown.vx v4, v12, a3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1832
+; CHECK-NEXT: add a4, sp, a0
+; CHECK-NEXT: vse8.v v4, (a4)
+; CHECK-NEXT: li a4, 100
+; CHECK-NEXT: vslidedown.vx v4, v12, a4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1824
+; CHECK-NEXT: add a5, sp, a0
+; CHECK-NEXT: vse8.v v4, (a5)
+; CHECK-NEXT: li a5, 99
+; CHECK-NEXT: vslidedown.vx v4, v12, a5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1816
+; CHECK-NEXT: add a6, sp, a0
+; CHECK-NEXT: vse8.v v4, (a6)
+; CHECK-NEXT: li a6, 98
+; CHECK-NEXT: vslidedown.vx v4, v12, a6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1808
+; CHECK-NEXT: add a7, sp, a0
+; CHECK-NEXT: vse8.v v4, (a7)
+; CHECK-NEXT: li a7, 97
+; CHECK-NEXT: vslidedown.vx v4, v12, a7
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1800
+; CHECK-NEXT: add t0, sp, a0
+; CHECK-NEXT: vse8.v v4, (t0)
+; CHECK-NEXT: li t0, 96
+; CHECK-NEXT: vslidedown.vx v4, v12, t0
+; CHECK-NEXT: li a0, 23
+; CHECK-NEXT: slli a0, a0, 8
+; CHECK-NEXT: add t1, sp, a0
+; CHECK-NEXT: vse8.v v4, (t1)
+; CHECK-NEXT: li t1, 95
+; CHECK-NEXT: vslidedown.vx v4, v12, t1
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1784
+; CHECK-NEXT: add t2, sp, a0
+; CHECK-NEXT: vse8.v v4, (t2)
+; CHECK-NEXT: li t2, 94
+; CHECK-NEXT: vslidedown.vx v4, v12, t2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1776
+; CHECK-NEXT: add t3, sp, a0
+; CHECK-NEXT: vse8.v v4, (t3)
+; CHECK-NEXT: li t3, 93
+; CHECK-NEXT: vslidedown.vx v4, v12, t3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1768
+; CHECK-NEXT: add t4, sp, a0
+; CHECK-NEXT: vse8.v v4, (t4)
+; CHECK-NEXT: li t4, 92
+; CHECK-NEXT: vslidedown.vx v4, v12, t4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1760
+; CHECK-NEXT: add t5, sp, a0
+; CHECK-NEXT: vse8.v v4, (t5)
+; CHECK-NEXT: li t5, 91
+; CHECK-NEXT: vslidedown.vx v4, v12, t5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1752
+; CHECK-NEXT: add t6, sp, a0
+; CHECK-NEXT: vse8.v v4, (t6)
+; CHECK-NEXT: li t6, 90
+; CHECK-NEXT: vslidedown.vx v4, v12, t6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1744
+; CHECK-NEXT: add s2, sp, a0
+; CHECK-NEXT: vse8.v v4, (s2)
+; CHECK-NEXT: li s2, 89
+; CHECK-NEXT: vslidedown.vx v4, v12, s2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1736
+; CHECK-NEXT: add s3, sp, a0
+; CHECK-NEXT: vse8.v v4, (s3)
+; CHECK-NEXT: li s3, 88
+; CHECK-NEXT: vslidedown.vx v4, v12, s3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1728
+; CHECK-NEXT: add s4, sp, a0
+; CHECK-NEXT: vse8.v v4, (s4)
+; CHECK-NEXT: li s4, 87
+; CHECK-NEXT: vslidedown.vx v4, v12, s4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1720
+; CHECK-NEXT: add s5, sp, a0
+; CHECK-NEXT: vse8.v v4, (s5)
+; CHECK-NEXT: li s5, 86
+; CHECK-NEXT: vslidedown.vx v4, v12, s5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1712
+; CHECK-NEXT: add s6, sp, a0
+; CHECK-NEXT: vse8.v v4, (s6)
+; CHECK-NEXT: li s6, 85
+; CHECK-NEXT: vslidedown.vx v4, v12, s6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1704
+; CHECK-NEXT: add s7, sp, a0
+; CHECK-NEXT: vse8.v v4, (s7)
+; CHECK-NEXT: li s7, 84
+; CHECK-NEXT: vslidedown.vx v4, v12, s7
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1696
+; CHECK-NEXT: add s8, sp, a0
+; CHECK-NEXT: vse8.v v4, (s8)
+; CHECK-NEXT: li s8, 83
+; CHECK-NEXT: vslidedown.vx v4, v12, s8
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1688
+; CHECK-NEXT: add s9, sp, a0
+; CHECK-NEXT: vse8.v v4, (s9)
+; CHECK-NEXT: li s9, 82
+; CHECK-NEXT: vslidedown.vx v4, v12, s9
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1680
+; CHECK-NEXT: add s10, sp, a0
+; CHECK-NEXT: vse8.v v4, (s10)
+; CHECK-NEXT: li s10, 81
+; CHECK-NEXT: vslidedown.vx v4, v12, s10
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1672
+; CHECK-NEXT: add s11, sp, a0
+; CHECK-NEXT: vse8.v v4, (s11)
+; CHECK-NEXT: li s11, 80
+; CHECK-NEXT: vslidedown.vx v4, v12, s11
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1664
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 79
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1656
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 78
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1648
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 77
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1640
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 76
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1632
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 75
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1624
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 74
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1616
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 73
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1608
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 72
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1600
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 71
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1592
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 70
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1584
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 69
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1576
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 68
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1568
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 67
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1560
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 66
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1552
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 65
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1544
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 64
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: li a0, 11
+; CHECK-NEXT: slli a0, a0, 9
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 63
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1528
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 62
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1520
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 61
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1512
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 60
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1504
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 59
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1496
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 58
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1488
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 57
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1480
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 56
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1472
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 55
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1464
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 54
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1456
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 53
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1448
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 52
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1440
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 51
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1432
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 50
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1424
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 49
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1416
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 48
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1408
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 47
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1400
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 46
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1392
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 45
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1384
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 44
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1376
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 43
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1368
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 42
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1360
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 41
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1352
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 40
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1344
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 39
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1336
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 38
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1328
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 37
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1320
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 36
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1312
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 35
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1304
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 34
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1296
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 33
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1288
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vslidedown.vx v4, v12, a0
+; CHECK-NEXT: li a0, 21
+; CHECK-NEXT: slli a0, a0, 8
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 31
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1272
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 30
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1264
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 29
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1256
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 28
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1248
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 27
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1240
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 26
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1232
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 25
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1224
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 24
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1216
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1208
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: vslidedown.vi v4, v12, 23
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1200
+; CHECK-NEXT: add ra, sp, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1192
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vslidedown.vi v4, v12, 22
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: vslidedown.vi v4, v12, 21
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1184
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1176
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 20
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 19
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1168
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1160
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 18
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 17
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1152
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1144
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 16
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 15
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1136
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1128
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 14
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 13
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1120
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1112
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 12
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 11
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1104
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1096
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 10
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 9
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1088
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1080
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 8
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 7
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1072
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1064
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 6
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 5
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1056
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1048
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 4
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 3
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1040
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui ra, 1
+; CHECK-NEXT: addiw ra, ra, 1032
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: vslidedown.vi v4, v12, 2
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v4, v12, 1
+; CHECK-NEXT: vse8.v v4, (ra)
+; CHECK-NEXT: li a0, 5
+; CHECK-NEXT: slli a0, a0, 10
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: li a0, 104
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1020
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vx v11, v8, a1
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1012
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vslidedown.vx v14, v8, a2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1004
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: vslidedown.vx v15, v8, a3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 996
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vslidedown.vx v16, v8, a4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 988
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: vslidedown.vx v17, v8, a5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 980
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vslidedown.vx v18, v8, a6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 972
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: vslidedown.vx v19, v8, a7
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 964
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vslidedown.vx v20, v8, t0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 956
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: vslidedown.vx v21, v8, t1
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 948
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vslidedown.vx v22, v8, t2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 940
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: vslidedown.vx v23, v8, t3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 932
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vslidedown.vx v24, v8, t4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 924
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vslidedown.vx v10, v8, t5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 916
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: vslidedown.vx v25, v8, t6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 908
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vslidedown.vx v26, v8, s2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 900
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: vslidedown.vx v27, v8, s3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 892
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vslidedown.vx v28, v8, s4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 884
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: vslidedown.vx v29, v8, s5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 876
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vslidedown.vx v30, v8, s6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 868
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: vslidedown.vx v31, v8, s7
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 860
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: vslidedown.vx v7, v8, s8
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 852
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vslidedown.vx v6, v8, s9
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 844
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: vslidedown.vx v5, v8, s10
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 836
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vx v4, v8, s11
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 828
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 79
+; CHECK-NEXT: vslidedown.vx v11, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 820
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: li a0, 78
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 812
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: li a0, 77
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 804
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: li a0, 76
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 796
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: li a0, 75
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 788
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: li a0, 74
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 780
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: li a0, 73
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 772
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: li a0, 72
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 764
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 71
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 756
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: li a0, 70
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 748
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: li a0, 69
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 740
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: li a0, 68
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 732
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 67
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 724
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: li a0, 66
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 716
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: li a0, 65
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 708
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: li a0, 64
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 700
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: li a0, 63
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 692
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: li a0, 62
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 684
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: li a0, 61
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 676
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: li a0, 60
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 668
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: li a0, 59
+; CHECK-NEXT: vslidedown.vx v7, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 660
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a0, 58
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 652
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li a0, 57
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 644
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 56
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 636
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 55
+; CHECK-NEXT: vslidedown.vx v11, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 628
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: li a0, 54
+; CHECK-NEXT: vslidedown.vx v3, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 620
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: li a0, 53
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 612
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: li a0, 52
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 604
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: li a0, 51
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 596
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: li a0, 50
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 588
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: li a0, 49
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 580
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: li a0, 48
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 572
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 47
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 564
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: li a0, 46
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 556
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: li a0, 45
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 548
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: li a0, 44
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 540
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 43
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 532
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: li a0, 42
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 524
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: li a0, 41
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 516
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: li a0, 40
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 508
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: li a0, 39
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 500
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: li a0, 38
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 492
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: li a0, 37
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 484
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: li a0, 36
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 476
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: li a0, 35
+; CHECK-NEXT: vslidedown.vx v7, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 468
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a0, 34
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 460
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li a0, 33
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 452
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 444
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 436
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v3, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 383
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 428
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 420
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 382
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 412
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 404
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 381
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 396
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 388
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 380
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 380
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 372
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 379
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 364
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 356
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 378
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 348
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 340
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 377
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 332
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 324
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 376
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 316
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 308
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 375
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 300
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 292
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 374
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 284
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 276
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 373
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 268
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 260
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 31
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 252
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 30
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 244
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 29
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 236
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 28
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 228
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 27
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 220
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 26
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 212
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 25
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 204
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 24
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 196
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 23
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 188
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 22
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 180
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 21
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 172
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 20
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 164
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 19
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 156
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 18
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 148
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 17
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 140
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 16
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 132
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 15
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 124
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 14
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 116
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 13
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 108
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 12
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 100
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 11
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 92
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 10
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 84
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 9
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 76
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 8
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 68
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 7
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 60
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 6
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 52
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 5
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 44
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 4
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 36
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 3
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 28
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 2
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 20
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vslidedown.vi v11, v8, 1
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 12
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 372
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1021
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 371
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1013
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 370
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 1005
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 369
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 997
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 368
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 989
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 367
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 981
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 366
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 973
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 365
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 965
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 364
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 957
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 363
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 949
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 362
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 941
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 361
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 933
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 360
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 925
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 359
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 917
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 358
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 909
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 357
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 901
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 356
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 893
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 355
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 885
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 354
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 877
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 353
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 869
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 352
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 861
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 351
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 853
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 350
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 845
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 349
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 837
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 348
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 829
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 347
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 821
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 346
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 813
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 345
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 805
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 344
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 797
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 343
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 789
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 342
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 781
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 341
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 773
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 340
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 765
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 339
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 757
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 338
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 749
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 337
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 741
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 336
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 733
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 335
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 725
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 334
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 717
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 333
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 709
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 332
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 701
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 331
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 693
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 330
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 685
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 329
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 677
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 328
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 669
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 327
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 661
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 326
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 653
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 325
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 645
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 324
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 637
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 323
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 629
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 322
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 621
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 321
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 613
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 320
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 605
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 319
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 597
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 318
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 589
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 317
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 581
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 316
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 573
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 315
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 565
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 314
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 557
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 313
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 549
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 312
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 541
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 311
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 533
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 310
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 525
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 309
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 517
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 308
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 509
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 307
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 501
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 306
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 493
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 305
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 485
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 304
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 477
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 303
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 469
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 302
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 461
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 301
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 453
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 300
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 445
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 299
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 437
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 298
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 429
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 297
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 421
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 296
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 413
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 295
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 405
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 294
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 397
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 293
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 389
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 292
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 381
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 291
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 373
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 290
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 365
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 289
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v28, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 357
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 288
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 349
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 287
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 341
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v0, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 286
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 333
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 285
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 325
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 284
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 317
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 283
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 309
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 282
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 301
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 281
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 293
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 280
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 285
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 279
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 277
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 4
+; CHECK-NEXT: add s7, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 277
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 173
+; CHECK-NEXT: add a1, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a1)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 275
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 157
+; CHECK-NEXT: add a2, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a2)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 261
+; CHECK-NEXT: add s8, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 273
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 141
+; CHECK-NEXT: add a3, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a3)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 253
+; CHECK-NEXT: add s9, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 271
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 125
+; CHECK-NEXT: add a4, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a4)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 245
+; CHECK-NEXT: add a4, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 269
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 109
+; CHECK-NEXT: add a5, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a5)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 237
+; CHECK-NEXT: add a5, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 267
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 93
+; CHECK-NEXT: add a6, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a6)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 229
+; CHECK-NEXT: add a6, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 265
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 77
+; CHECK-NEXT: add a7, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a7)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 221
+; CHECK-NEXT: add a3, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 263
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 61
+; CHECK-NEXT: add t0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t0)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 213
+; CHECK-NEXT: add a1, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 261
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 45
+; CHECK-NEXT: add t1, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t1)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 205
+; CHECK-NEXT: add a2, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 259
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 29
+; CHECK-NEXT: add t2, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t2)
+; CHECK-NEXT: lui a0, 1
+; CHECK-NEXT: addiw a0, a0, 197
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 257
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 13
+; CHECK-NEXT: add t3, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t3)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 5
+; CHECK-NEXT: add t4, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 256
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 189
+; CHECK-NEXT: add t3, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t4)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 21
+; CHECK-NEXT: add t5, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 258
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 181
+; CHECK-NEXT: add t4, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t5)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 37
+; CHECK-NEXT: add t6, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 260
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 165
+; CHECK-NEXT: add t5, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t6)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 53
+; CHECK-NEXT: add s2, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 262
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 149
+; CHECK-NEXT: add t6, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s2)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 69
+; CHECK-NEXT: add s2, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 264
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 133
+; CHECK-NEXT: add s3, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s2)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 85
+; CHECK-NEXT: add s2, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 266
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 117
+; CHECK-NEXT: add s4, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s2)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 101
+; CHECK-NEXT: add s2, sp, a7
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 268
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li s10, 255
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s2)
+; CHECK-NEXT: li s2, 254
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 270
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li s11, 253
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s4)
+; CHECK-NEXT: li s4, 252
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 272
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li ra, 251
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (s3)
+; CHECK-NEXT: li s3, 250
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 274
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li t2, 249
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t6)
+; CHECK-NEXT: li s5, 248
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 276
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li t1, 247
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (t5)
+; CHECK-NEXT: li s6, 246
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a7, 278
+; CHECK-NEXT: vslidedown.vx v18, v8, a7
+; CHECK-NEXT: li t0, 245
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v8, (s7)
+; CHECK-NEXT: li s7, 244
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: slli a7, a7, 3
+; CHECK-NEXT: mv t5, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t5, t5, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t5, t5, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t5
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t5, 3
+; CHECK-NEXT: addiw t5, t5, -1120
+; CHECK-NEXT: add a7, a7, t5
+; CHECK-NEXT: vl2r.v v20, (a7) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: addiw a7, a7, 269
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: vse8.v v20, (a7)
+; CHECK-NEXT: li a7, 243
+; CHECK-NEXT: vse8.v v4, (s8)
+; CHECK-NEXT: li s8, 242
+; CHECK-NEXT: vse8.v v2, (s9)
+; CHECK-NEXT: li s9, 241
+; CHECK-NEXT: vse8.v v0, (a4)
+; CHECK-NEXT: li t5, 240
+; CHECK-NEXT: vse8.v v10, (a5)
+; CHECK-NEXT: li t6, 239
+; CHECK-NEXT: vse8.v v14, (a6)
+; CHECK-NEXT: li a5, 238
+; CHECK-NEXT: vse8.v v16, (a3)
+; CHECK-NEXT: li a6, 237
+; CHECK-NEXT: vse8.v v28, (a1)
+; CHECK-NEXT: li a3, 236
+; CHECK-NEXT: vse8.v v30, (a2)
+; CHECK-NEXT: li a4, 235
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a1, 234
+; CHECK-NEXT: vse8.v v18, (t4)
+; CHECK-NEXT: li a2, 233
+; CHECK-NEXT: vse8.v v24, (t3)
+; CHECK-NEXT: li a0, 232
+; CHECK-NEXT: vslidedown.vx v10, v12, s10
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 3
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s2
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 3
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s11
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 3
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s4
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 3
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: slli t3, t3, 4
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s3
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: mv t4, t3
+; CHECK-NEXT: slli t3, t3, 4
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t4, t4, t3
+; CHECK-NEXT: slli t3, t3, 2
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui t4, 3
+; CHECK-NEXT: addiw t4, t4, -1120
+; CHECK-NEXT: add t3, t3, t4
+; CHECK-NEXT: vs1r.v v10, (t3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, t2
+; CHECK-NEXT: csrr t2, vlenb
+; CHECK-NEXT: slli t2, t2, 1
+; CHECK-NEXT: mv t3, t2
+; CHECK-NEXT: slli t2, t2, 3
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 2
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 2
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: lui t3, 3
+; CHECK-NEXT: addiw t3, t3, -1120
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: vs1r.v v10, (t2) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s5
+; CHECK-NEXT: csrr t2, vlenb
+; CHECK-NEXT: mv t3, t2
+; CHECK-NEXT: slli t2, t2, 1
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 3
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 2
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 2
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: lui t3, 3
+; CHECK-NEXT: addiw t3, t3, -1120
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: vs1r.v v10, (t2) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, t1
+; CHECK-NEXT: csrr t1, vlenb
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: mv t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: lui t2, 3
+; CHECK-NEXT: addiw t2, t2, -1120
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: vs1r.v v10, (t1) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s6
+; CHECK-NEXT: csrr t1, vlenb
+; CHECK-NEXT: mv t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: lui t2, 3
+; CHECK-NEXT: addiw t2, t2, -1120
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: vs1r.v v10, (t1) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, t0
+; CHECK-NEXT: csrr t0, vlenb
+; CHECK-NEXT: slli t0, t0, 1
+; CHECK-NEXT: mv t1, t0
+; CHECK-NEXT: slli t0, t0, 1
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: add t0, sp, t0
+; CHECK-NEXT: lui t1, 3
+; CHECK-NEXT: addiw t1, t1, -1120
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: vs1r.v v10, (t0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s7
+; CHECK-NEXT: csrr t0, vlenb
+; CHECK-NEXT: mv t1, t0
+; CHECK-NEXT: slli t0, t0, 1
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 1
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: add t0, sp, t0
+; CHECK-NEXT: lui t1, 3
+; CHECK-NEXT: addiw t1, t1, -1120
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: vs1r.v v10, (t0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a7
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: slli a7, a7, 3
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs1r.v v10, (a7) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s8
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 3
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs1r.v v10, (a7) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, s9
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs1r.v v10, (a7) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, t5
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs1r.v v10, (a7) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, t6
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs1r.v v10, (a7) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a5
+; CHECK-NEXT: csrr a5, vlenb
+; CHECK-NEXT: mv a7, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a7, a7, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a7, a7, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a7, a7, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a7, a7, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a5, a5, a7
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: lui a7, 3
+; CHECK-NEXT: addiw a7, a7, -1120
+; CHECK-NEXT: add a5, a5, a7
+; CHECK-NEXT: vs1r.v v10, (a5) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a6
+; CHECK-NEXT: csrr a5, vlenb
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: mv a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: lui a6, 3
+; CHECK-NEXT: addiw a6, a6, -1120
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: vs1r.v v10, (a5) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a3
+; CHECK-NEXT: csrr a3, vlenb
+; CHECK-NEXT: slli a3, a3, 5
+; CHECK-NEXT: mv a5, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a5, a5, a3
+; CHECK-NEXT: slli a3, a3, 2
+; CHECK-NEXT: add a3, a3, a5
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: lui a5, 3
+; CHECK-NEXT: addiw a5, a5, -1120
+; CHECK-NEXT: add a3, a3, a5
+; CHECK-NEXT: vs1r.v v10, (a3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a4
+; CHECK-NEXT: csrr a3, vlenb
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: mv a4, a3
+; CHECK-NEXT: slli a3, a3, 4
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 2
+; CHECK-NEXT: add a3, a3, a4
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: lui a4, 3
+; CHECK-NEXT: addiw a4, a4, -1120
+; CHECK-NEXT: add a3, a3, a4
+; CHECK-NEXT: vs1r.v v10, (a3) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a1
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a3, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a3, a3, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a3, a3, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a3
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a1, a1, a3
+; CHECK-NEXT: vs1r.v v10, (a1) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a2
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vs1r.v v10, (a1) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v10, v12, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 231
+; CHECK-NEXT: li s11, 408
+; CHECK-NEXT: li s10, 407
+; CHECK-NEXT: li s9, 406
+; CHECK-NEXT: li s8, 405
+; CHECK-NEXT: li s7, 404
+; CHECK-NEXT: li s6, 403
+; CHECK-NEXT: li s5, 402
+; CHECK-NEXT: li s4, 401
+; CHECK-NEXT: li s3, 400
+; CHECK-NEXT: li s2, 399
+; CHECK-NEXT: li t6, 398
+; CHECK-NEXT: li t5, 397
+; CHECK-NEXT: li t4, 396
+; CHECK-NEXT: li t3, 395
+; CHECK-NEXT: li t2, 394
+; CHECK-NEXT: li t1, 393
+; CHECK-NEXT: li t0, 392
+; CHECK-NEXT: li a7, 391
+; CHECK-NEXT: li a6, 390
+; CHECK-NEXT: li a5, 389
+; CHECK-NEXT: li a4, 388
+; CHECK-NEXT: li a3, 387
+; CHECK-NEXT: li a2, 386
+; CHECK-NEXT: li a1, 385
+; CHECK-NEXT: li a0, 384
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: sd s11, 8(sp) # 8-byte Folded Spill
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 230
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 229
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 228
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 227
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 226
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 225
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 224
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 223
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 222
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 221
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 220
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 219
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 218
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 217
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 216
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 215
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 214
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 213
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 212
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 211
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 210
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 209
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 208
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 207
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 206
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 205
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli ra, s11, 8
+; CHECK-NEXT: sub s11, ra, s11
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 204
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 8
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 203
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli ra, s11, 8
+; CHECK-NEXT: add s11, ra, s11
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 202
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 7
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 201
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 7
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 200
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 199
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 198
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 197
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 196
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 195
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 194
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 193
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 192
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 191
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 190
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 189
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 188
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 187
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 186
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 185
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 184
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 183
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 182
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 181
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 180
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 179
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 178
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 177
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 176
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 175
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 174
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 173
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 172
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 171
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 170
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 169
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 168
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 167
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 166
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 165
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 164
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 163
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 162
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 161
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 160
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 159
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 158
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 157
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 156
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 155
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 154
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 153
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 152
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 151
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 150
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 149
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 148
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 147
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 146
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 145
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 144
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 143
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 142
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 141
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 140
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 139
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 138
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 6
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 137
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 136
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 5
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 135
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 134
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 133
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 132
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 4
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 131
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 130
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 129
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr s11, vlenb
+; CHECK-NEXT: slli s11, s11, 1
+; CHECK-NEXT: mv ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 3
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: slli s11, s11, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: lui ra, 3
+; CHECK-NEXT: addiw ra, ra, -1120
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: vs1r.v v10, (s11) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: li ra, 128
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: csrr ra, vlenb
+; CHECK-NEXT: mv s11, ra
+; CHECK-NEXT: slli ra, ra, 1
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: slli ra, ra, 2
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: slli ra, ra, 3
+; CHECK-NEXT: add s11, s11, ra
+; CHECK-NEXT: slli ra, ra, 2
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: add ra, sp, ra
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add ra, ra, s11
+; CHECK-NEXT: ld s11, 8(sp) # 8-byte Folded Reload
+; CHECK-NEXT: vs1r.v v10, (ra) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li ra, 511
+; CHECK-NEXT: vslidedown.vx v10, v12, ra
+; CHECK-NEXT: li ra, 510
+; CHECK-NEXT: vslidedown.vx v14, v12, ra
+; CHECK-NEXT: li ra, 509
+; CHECK-NEXT: vslidedown.vx v16, v12, ra
+; CHECK-NEXT: li ra, 508
+; CHECK-NEXT: vslidedown.vx v18, v12, ra
+; CHECK-NEXT: li ra, 507
+; CHECK-NEXT: vslidedown.vx v20, v12, ra
+; CHECK-NEXT: li ra, 506
+; CHECK-NEXT: vslidedown.vx v22, v12, ra
+; CHECK-NEXT: li ra, 505
+; CHECK-NEXT: vslidedown.vx v24, v12, ra
+; CHECK-NEXT: li ra, 504
+; CHECK-NEXT: vslidedown.vx v26, v12, ra
+; CHECK-NEXT: li ra, 503
+; CHECK-NEXT: vslidedown.vx v28, v12, ra
+; CHECK-NEXT: li ra, 502
+; CHECK-NEXT: vslidedown.vx v6, v12, ra
+; CHECK-NEXT: li ra, 501
+; CHECK-NEXT: vslidedown.vx v2, v12, ra
+; CHECK-NEXT: li ra, 500
+; CHECK-NEXT: vslidedown.vx v30, v12, ra
+; CHECK-NEXT: li ra, 499
+; CHECK-NEXT: vslidedown.vx v4, v12, ra
+; CHECK-NEXT: li ra, 498
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: sd a0, 8(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sd a1, 0(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 3
+; CHECK-NEXT: addiw a0, a0, -1120
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 497
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 496
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 495
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 494
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 493
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 492
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 491
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 490
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 489
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 488
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 487
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 486
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 485
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 484
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 483
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 482
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 481
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 480
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 479
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 478
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 477
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 476
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 475
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 474
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 473
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 472
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 471
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 470
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 469
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 468
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 467
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 466
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 6
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 465
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 464
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 463
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 462
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 461
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 460
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 459
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 458
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 457
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 456
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 455
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 454
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 453
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 452
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 451
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 450
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 449
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 448
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 447
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 446
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 445
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 444
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 443
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 442
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 441
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 440
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 439
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 438
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 437
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 436
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 435
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a1, a0, 7
+; CHECK-NEXT: sub a0, a1, a0
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 434
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a1, a0, 7
+; CHECK-NEXT: add a0, a1, a0
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 433
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 6
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 432
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 431
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 430
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 429
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 428
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 427
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 426
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 425
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 424
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 423
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 422
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 421
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 420
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 419
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 418
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 417
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 416
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 415
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 414
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 413
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 412
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 411
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 410
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: li ra, 409
+; CHECK-NEXT: vslidedown.vx v0, v12, ra
+; CHECK-NEXT: li ra, 409
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s11
+; CHECK-NEXT: li s11, 408
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s10
+; CHECK-NEXT: li s10, 407
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s9
+; CHECK-NEXT: li s9, 406
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s8
+; CHECK-NEXT: li s8, 405
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s7
+; CHECK-NEXT: li s7, 404
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s6
+; CHECK-NEXT: li s6, 403
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s5
+; CHECK-NEXT: li s5, 402
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 6
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s4
+; CHECK-NEXT: li s4, 401
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s3
+; CHECK-NEXT: li s3, 400
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, s2
+; CHECK-NEXT: li s2, 399
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t6
+; CHECK-NEXT: li t6, 398
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t5
+; CHECK-NEXT: li t5, 397
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t4
+; CHECK-NEXT: li t4, 396
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: ld a1, 0(sp) # 8-byte Folded Reload
+; CHECK-NEXT: vs2r.v v0, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t3
+; CHECK-NEXT: csrr t3, vlenb
+; CHECK-NEXT: mv a0, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add a0, a0, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add a0, a0, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add a0, a0, t3
+; CHECK-NEXT: slli t3, t3, 3
+; CHECK-NEXT: add a0, a0, t3
+; CHECK-NEXT: slli t3, t3, 1
+; CHECK-NEXT: add t3, t3, a0
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: lui a0, 3
+; CHECK-NEXT: addiw a0, a0, -1120
+; CHECK-NEXT: add t3, t3, a0
+; CHECK-NEXT: ld a0, 8(sp) # 8-byte Folded Reload
+; CHECK-NEXT: vs2r.v v0, (t3) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t2
+; CHECK-NEXT: csrr t2, vlenb
+; CHECK-NEXT: mv t3, t2
+; CHECK-NEXT: slli t2, t2, 4
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 2
+; CHECK-NEXT: add t3, t3, t2
+; CHECK-NEXT: slli t2, t2, 1
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: lui t3, 3
+; CHECK-NEXT: addiw t3, t3, -1120
+; CHECK-NEXT: add t2, t2, t3
+; CHECK-NEXT: vs2r.v v0, (t2) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t1
+; CHECK-NEXT: csrr t1, vlenb
+; CHECK-NEXT: mv t2, t1
+; CHECK-NEXT: slli t1, t1, 1
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 3
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 2
+; CHECK-NEXT: add t2, t2, t1
+; CHECK-NEXT: slli t1, t1, 1
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: lui t2, 3
+; CHECK-NEXT: addiw t2, t2, -1120
+; CHECK-NEXT: add t1, t1, t2
+; CHECK-NEXT: vs2r.v v0, (t1) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, t0
+; CHECK-NEXT: csrr t0, vlenb
+; CHECK-NEXT: mv t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 2
+; CHECK-NEXT: add t1, t1, t0
+; CHECK-NEXT: slli t0, t0, 1
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: add t0, sp, t0
+; CHECK-NEXT: lui t1, 3
+; CHECK-NEXT: addiw t1, t1, -1120
+; CHECK-NEXT: add t0, t0, t1
+; CHECK-NEXT: vs2r.v v0, (t0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a7
+; CHECK-NEXT: csrr a7, vlenb
+; CHECK-NEXT: mv t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 2
+; CHECK-NEXT: add t0, t0, a7
+; CHECK-NEXT: slli a7, a7, 1
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: lui t0, 3
+; CHECK-NEXT: addiw t0, t0, -1120
+; CHECK-NEXT: add a7, a7, t0
+; CHECK-NEXT: vs2r.v v0, (a7) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a6
+; CHECK-NEXT: csrr a6, vlenb
+; CHECK-NEXT: mv a7, a6
+; CHECK-NEXT: slli a6, a6, 3
+; CHECK-NEXT: add a7, a7, a6
+; CHECK-NEXT: slli a6, a6, 1
+; CHECK-NEXT: add a7, a7, a6
+; CHECK-NEXT: slli a6, a6, 2
+; CHECK-NEXT: add a7, a7, a6
+; CHECK-NEXT: slli a6, a6, 1
+; CHECK-NEXT: add a6, a6, a7
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: lui a7, 3
+; CHECK-NEXT: addiw a7, a7, -1120
+; CHECK-NEXT: add a6, a6, a7
+; CHECK-NEXT: vs2r.v v0, (a6) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a5
+; CHECK-NEXT: csrr a5, vlenb
+; CHECK-NEXT: mv a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: lui a6, 3
+; CHECK-NEXT: addiw a6, a6, -1120
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: vs2r.v v0, (a5) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a4
+; CHECK-NEXT: csrr a4, vlenb
+; CHECK-NEXT: mv a5, a4
+; CHECK-NEXT: slli a4, a4, 2
+; CHECK-NEXT: add a5, a5, a4
+; CHECK-NEXT: slli a4, a4, 1
+; CHECK-NEXT: add a5, a5, a4
+; CHECK-NEXT: slli a4, a4, 1
+; CHECK-NEXT: add a5, a5, a4
+; CHECK-NEXT: slli a4, a4, 2
+; CHECK-NEXT: add a5, a5, a4
+; CHECK-NEXT: slli a4, a4, 1
+; CHECK-NEXT: add a4, a4, a5
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: lui a5, 3
+; CHECK-NEXT: addiw a5, a5, -1120
+; CHECK-NEXT: add a4, a4, a5
+; CHECK-NEXT: vs2r.v v0, (a4) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a3
+; CHECK-NEXT: csrr a3, vlenb
+; CHECK-NEXT: mv a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 2
+; CHECK-NEXT: add a4, a4, a3
+; CHECK-NEXT: slli a3, a3, 1
+; CHECK-NEXT: add a3, a3, a4
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: lui a4, 3
+; CHECK-NEXT: addiw a4, a4, -1120
+; CHECK-NEXT: add a3, a3, a4
+; CHECK-NEXT: vs2r.v v0, (a3) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 5
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vs2r.v v0, (a2) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v0, v12, a1
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vs2r.v v0, (a1) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vslidedown.vx v12, v12, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vl1r.v v11, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1528
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2041
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2033
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2025
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2017
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2009
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2001
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1993
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1985
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1977
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1969
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1961
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1953
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1945
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1937
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1929
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1921
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1913
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1905
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1897
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1889
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1881
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1873
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1865
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1857
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1849
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1841
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1833
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1825
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1817
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1809
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1801
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1793
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1785
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1777
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1769
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1761
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1753
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1745
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1737
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1729
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1721
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1713
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1705
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1697
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1689
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1681
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1673
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1665
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1657
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1649
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1641
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1633
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1625
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1617
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1609
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1601
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1593
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1585
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1577
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1569
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1561
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1553
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1545
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1537
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1529
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1521
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1513
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1505
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1497
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1489
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1481
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1473
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1465
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1457
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1449
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1441
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1433
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a2, a1, 7
+; CHECK-NEXT: sub a1, a2, a1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1425
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a2, a1, 7
+; CHECK-NEXT: add a1, a2, a1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1417
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1409
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1401
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1393
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1385
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1377
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1369
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1361
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1353
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1345
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1337
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1329
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1321
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1313
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1305
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1297
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1289
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1281
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1273
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1265
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1257
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1249
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1241
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1233
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1225
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1217
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1209
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1201
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1193
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1185
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1177
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1169
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1161
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1153
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1145
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1137
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1129
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1121
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1113
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1105
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1097
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1089
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1081
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1073
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1065
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1057
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1049
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1041
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1033
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1025
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2040
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2032
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2024
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2016
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2008
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 2000
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1992
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1984
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1976
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1968
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1960
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1952
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1944
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1936
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1928
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1920
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1912
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1904
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1896
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1888
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1880
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1872
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1864
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1856
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1848
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1840
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1832
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1824
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1816
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1808
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1800
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1792
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1784
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1776
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1768
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1760
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1752
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1744
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1736
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1728
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1720
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1712
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1704
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1696
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1688
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1680
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1672
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1664
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1656
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1648
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1640
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a2, a1, 8
+; CHECK-NEXT: sub a1, a2, a1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1632
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 8
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1624
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a2, a1, 8
+; CHECK-NEXT: add a1, a2, a1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1616
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 7
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1608
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 7
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1600
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1592
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1584
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1576
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 6
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1568
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1560
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1552
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1544
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 19
+; CHECK-NEXT: slli a0, a0, 9
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1520
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1512
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1504
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1496
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1488
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1480
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1472
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1464
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1456
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1448
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1440
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1432
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1424
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1416
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1408
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1400
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1392
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1384
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1376
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1368
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1360
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1352
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1344
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1336
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1328
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1320
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1312
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1304
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1296
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1288
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1280
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1272
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1264
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1256
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1248
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1240
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1232
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: li a1, 255
+; CHECK-NEXT: vslidedown.vx v11, v8, a1
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v10, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1224
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1216
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 254
+; CHECK-NEXT: vslidedown.vx v12, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 253
+; CHECK-NEXT: vslidedown.vx v13, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1208
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1200
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 252
+; CHECK-NEXT: vslidedown.vx v14, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 251
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1192
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1184
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 250
+; CHECK-NEXT: vslidedown.vx v16, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 249
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1176
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1168
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 248
+; CHECK-NEXT: vslidedown.vx v18, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 247
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1160
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1152
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 246
+; CHECK-NEXT: vslidedown.vx v20, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 245
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1144
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1136
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 244
+; CHECK-NEXT: vslidedown.vx v22, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 243
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1128
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1120
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 242
+; CHECK-NEXT: vslidedown.vx v24, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 241
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1112
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1104
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 240
+; CHECK-NEXT: vslidedown.vx v26, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 6
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 239
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 6
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1096
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1088
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 238
+; CHECK-NEXT: vslidedown.vx v28, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 5
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 237
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1080
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1072
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 236
+; CHECK-NEXT: vslidedown.vx v30, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 4
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 235
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1064
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1056
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 234
+; CHECK-NEXT: vslidedown.vx v7, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 4
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 233
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1048
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, 1040
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 232
+; CHECK-NEXT: vslidedown.vx v5, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 231
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1032
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: li a1, 9
+; CHECK-NEXT: slli a1, a1, 10
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: li a2, 230
+; CHECK-NEXT: vslidedown.vx v3, v8, a2
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add a3, a3, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui a3, 3
+; CHECK-NEXT: addiw a3, a3, -1120
+; CHECK-NEXT: add a2, a2, a3
+; CHECK-NEXT: vl1r.v v10, (a2) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 229
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a2, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a2, a2, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a0, a0, a2
+; CHECK-NEXT: vl1r.v v10, (a0) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: li a0, 228
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -4
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 227
+; CHECK-NEXT: vslidedown.vx v11, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -12
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: li a0, 226
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -20
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v13, (a0)
+; CHECK-NEXT: li a0, 225
+; CHECK-NEXT: vslidedown.vx v13, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -28
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: li a0, 224
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -36
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: li a0, 223
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -44
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: li a0, 222
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -52
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: li a0, 221
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -60
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: li a0, 220
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -68
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: li a0, 219
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -76
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: li a0, 218
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -84
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 217
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -92
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: li a0, 216
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -100
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: li a0, 215
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -108
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: li a0, 214
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -116
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: li a0, 213
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -124
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: li a0, 212
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -132
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: li a0, 211
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -140
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: li a0, 210
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -148
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: li a0, 209
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -156
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: li a0, 208
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -164
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: li a0, 207
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -172
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: li a0, 206
+; CHECK-NEXT: vslidedown.vx v7, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -180
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a0, 205
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -188
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li a0, 204
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -196
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 203
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -204
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v3, (a0)
+; CHECK-NEXT: li a0, 202
+; CHECK-NEXT: vslidedown.vx v3, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -212
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: li a0, 201
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -220
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 200
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -228
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 199
+; CHECK-NEXT: vslidedown.vx v11, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -236
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: li a0, 198
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -244
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v13, (a0)
+; CHECK-NEXT: li a0, 197
+; CHECK-NEXT: vslidedown.vx v13, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -252
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: li a0, 196
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -260
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: li a0, 195
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -268
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: li a0, 194
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -276
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: li a0, 193
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -284
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: li a0, 192
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -292
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: li a0, 191
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -300
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: li a0, 190
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -308
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 189
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -316
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: li a0, 188
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -324
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: li a0, 187
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -332
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: li a0, 186
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -340
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: li a0, 185
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -348
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: li a0, 184
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -356
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: li a0, 183
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -364
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: li a0, 182
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -372
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: li a0, 181
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -380
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: li a0, 180
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -388
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: li a0, 179
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -396
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: li a0, 178
+; CHECK-NEXT: vslidedown.vx v7, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -404
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a0, 177
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -412
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li a0, 176
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -420
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 175
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -428
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v3, (a0)
+; CHECK-NEXT: li a0, 174
+; CHECK-NEXT: vslidedown.vx v3, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -436
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: li a0, 173
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -444
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: li a0, 172
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -452
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 171
+; CHECK-NEXT: vslidedown.vx v11, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -460
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: li a0, 170
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -468
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v13, (a0)
+; CHECK-NEXT: li a0, 169
+; CHECK-NEXT: vslidedown.vx v13, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -476
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: li a0, 168
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -484
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: li a0, 167
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -492
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: li a0, 166
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 4
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -500
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: li a0, 165
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -508
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: li a0, 164
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -516
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: li a0, 163
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -524
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: li a0, 162
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -532
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 161
+; CHECK-NEXT: vslidedown.vx v21, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -540
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: li a0, 160
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -548
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: li a0, 159
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -556
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: li a0, 158
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -564
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: li a0, 157
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 3
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -572
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: li a0, 156
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -580
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: li a0, 155
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs1r.v v10, (a0) # vscale x 8-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -588
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: li a0, 154
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -596
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: li a0, 153
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -604
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: li a0, 152
+; CHECK-NEXT: vslidedown.vx v1, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -612
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: li a0, 151
+; CHECK-NEXT: vslidedown.vx v15, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -620
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: li a0, 150
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -628
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: li a0, 149
+; CHECK-NEXT: vslidedown.vx v17, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -636
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: li a0, 148
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -644
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: li a0, 147
+; CHECK-NEXT: vslidedown.vx v19, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -652
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v3, (a0)
+; CHECK-NEXT: li a0, 146
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -660
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: li a0, 145
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -668
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v0, (a0)
+; CHECK-NEXT: li a0, 144
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -676
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 143
+; CHECK-NEXT: vslidedown.vx v23, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -684
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 142
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -692
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v13, (a0)
+; CHECK-NEXT: li a0, 141
+; CHECK-NEXT: vslidedown.vx v25, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -700
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 140
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -708
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 139
+; CHECK-NEXT: vslidedown.vx v27, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -716
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 4
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 138
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -724
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 5
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 137
+; CHECK-NEXT: vslidedown.vx v29, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -732
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 136
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -740
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 135
+; CHECK-NEXT: vslidedown.vx v31, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -748
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 134
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -756
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v21, (a0)
+; CHECK-NEXT: li a0, 133
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -764
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 132
+; CHECK-NEXT: vslidedown.vx v7, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -772
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 131
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -780
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 130
+; CHECK-NEXT: vslidedown.vx v5, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -788
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 129
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -796
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: li a0, 128
+; CHECK-NEXT: vslidedown.vx v3, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -804
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a2, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a2, a2, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a2, 3
+; CHECK-NEXT: addiw a2, a2, -1120
+; CHECK-NEXT: add a1, a1, a2
+; CHECK-NEXT: vl1r.v v11, (a1) # vscale x 8-byte Folded Reload
+; CHECK-NEXT: vse8.v v11, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -812
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 511
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -820
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -828
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v1, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 510
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -836
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v15, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -844
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 509
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -852
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v17, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -860
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 508
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -868
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v19, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -876
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 507
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -884
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -892
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v0, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 506
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -900
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v23, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -908
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 505
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -916
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v25, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -924
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 504
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -932
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v27, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -940
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 503
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -948
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v29, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -956
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 502
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -964
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v31, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -972
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 501
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -980
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -988
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v7, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 500
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -996
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -1004
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v5, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 499
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -1012
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -1020
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vse8.v v3, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 498
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -3
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 497
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -11
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 496
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -19
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 495
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -27
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 494
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -35
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 493
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -43
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 492
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -51
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 491
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -59
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 490
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -67
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 489
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -75
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 488
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -83
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 487
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -91
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 486
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -99
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 485
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -107
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 484
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -115
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 483
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -123
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 482
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -131
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 481
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -139
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 480
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -147
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 479
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -155
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 478
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -163
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 477
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -171
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 476
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -179
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 475
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -187
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 474
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -195
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 473
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -203
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 472
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -211
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 471
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -219
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 470
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -227
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 469
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -235
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 468
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -243
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 467
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -251
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 466
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -259
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 465
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -267
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 464
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -275
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 463
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -283
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 462
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -291
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 461
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -299
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 460
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -307
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 459
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -315
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 458
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -323
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 457
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -331
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 456
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -339
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 455
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -347
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 454
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -355
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 453
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -363
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 452
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -371
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 451
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -379
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 450
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -387
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 449
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -395
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 448
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -403
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 447
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -411
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 446
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -419
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 445
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -427
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 444
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -435
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 443
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -443
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 442
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -451
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 441
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -459
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 440
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -467
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 439
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -475
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 438
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -483
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 437
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -491
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 436
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -499
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 435
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -507
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 434
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -515
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 433
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -523
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 432
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -531
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 431
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -539
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 430
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -547
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 429
+; CHECK-NEXT: vslidedown.vx v6, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -555
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 428
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -563
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 427
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -571
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 426
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -579
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 425
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -587
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 424
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -595
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 423
+; CHECK-NEXT: vslidedown.vx v18, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -603
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 422
+; CHECK-NEXT: vslidedown.vx v2, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -611
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 421
+; CHECK-NEXT: vslidedown.vx v20, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -619
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v0, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 420
+; CHECK-NEXT: vslidedown.vx v0, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -627
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 419
+; CHECK-NEXT: vslidedown.vx v22, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -635
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 418
+; CHECK-NEXT: vslidedown.vx v28, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -643
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 417
+; CHECK-NEXT: vslidedown.vx v24, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -651
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 416
+; CHECK-NEXT: vslidedown.vx v26, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -659
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v6, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 415
+; CHECK-NEXT: vslidedown.vx v30, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -667
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 414
+; CHECK-NEXT: vslidedown.vx v4, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -675
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 413
+; CHECK-NEXT: vslidedown.vx v10, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -683
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 412
+; CHECK-NEXT: vslidedown.vx v12, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -691
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 411
+; CHECK-NEXT: vslidedown.vx v14, v8, a0
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -699
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a0, 410
+; CHECK-NEXT: vslidedown.vx v16, v8, a0
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v16, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -707
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v6, v8, s11
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -715
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v2, v8, ra
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -723
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v16, v8, s9
+; CHECK-NEXT: csrr a0, vlenb
+; CHECK-NEXT: slli a0, a0, 5
+; CHECK-NEXT: mv a1, a0
+; CHECK-NEXT: slli a0, a0, 1
+; CHECK-NEXT: add a1, a1, a0
+; CHECK-NEXT: slli a0, a0, 2
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: lui a1, 3
+; CHECK-NEXT: addiw a1, a1, -1120
+; CHECK-NEXT: add a0, a0, a1
+; CHECK-NEXT: vs2r.v v16, (a0) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -731
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v0, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v20, v8, s10
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -739
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, 1995
+; CHECK-NEXT: add a3, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v22, v8, s7
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -747
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v28, (a0)
+; CHECK-NEXT: lui a0, 2
+; CHECK-NEXT: addiw a0, a0, -74
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v16, v8, s8
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -755
+; CHECK-NEXT: add a2, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v24, (a2)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -763
+; CHECK-NEXT: add a2, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v0, v8, s5
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -771
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v26, (a2)
+; CHECK-NEXT: lui a2, 2
+; CHECK-NEXT: addiw a2, a2, -779
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v18, v8, s6
+; CHECK-NEXT: lui a4, 2
+; CHECK-NEXT: addiw a4, a4, -787
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v30, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -795
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v24, v8, s3
+; CHECK-NEXT: csrr a5, vlenb
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: mv a6, a5
+; CHECK-NEXT: slli a5, a5, 4
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 1
+; CHECK-NEXT: add a6, a6, a5
+; CHECK-NEXT: slli a5, a5, 2
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: lui a6, 3
+; CHECK-NEXT: addiw a6, a6, -1120
+; CHECK-NEXT: add a5, a5, a6
+; CHECK-NEXT: vs2r.v v24, (a5) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: lui a5, 2
+; CHECK-NEXT: addiw a5, a5, -803
+; CHECK-NEXT: add a5, sp, a5
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a2)
+; CHECK-NEXT: lui a2, 2
+; CHECK-NEXT: addiw a2, a2, -811
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v4, v8, s4
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a4)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v24, v8, t6
+; CHECK-NEXT: csrr a4, vlenb
+; CHECK-NEXT: slli a4, a4, 3
+; CHECK-NEXT: mv a6, a4
+; CHECK-NEXT: slli a4, a4, 2
+; CHECK-NEXT: add a6, a6, a4
+; CHECK-NEXT: slli a4, a4, 1
+; CHECK-NEXT: add a6, a6, a4
+; CHECK-NEXT: slli a4, a4, 2
+; CHECK-NEXT: add a4, a4, a6
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: lui a6, 3
+; CHECK-NEXT: addiw a6, a6, -1120
+; CHECK-NEXT: add a4, a4, a6
+; CHECK-NEXT: vs2r.v v24, (a4) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v12, (a1)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v24, v8, s2
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a4, 3
+; CHECK-NEXT: addiw a4, a4, -1120
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: vs2r.v v24, (a1) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v14, (a5)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v12, v8, t4
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: mv a4, a1
+; CHECK-NEXT: slli a1, a1, 3
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a4, 3
+; CHECK-NEXT: addiw a4, a4, -1120
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: vs2r.v v12, (a1) # vscale x 16-byte Folded Spill
+; CHECK-NEXT: csrr a1, vlenb
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: mv a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 1
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a4, a4, a1
+; CHECK-NEXT: slli a1, a1, 2
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lui a4, 3
+; CHECK-NEXT: addiw a4, a4, -1120
+; CHECK-NEXT: add a1, a1, a4
+; CHECK-NEXT: vl2r.v v10, (a1) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v10, (a2)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: vslidedown.vx v12, v8, t5
+; CHECK-NEXT: lbu s8, 590(a0)
+; CHECK-NEXT: lbu a1, 591(a0)
+; CHECK-NEXT: sd a1, 328(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 592(a0)
+; CHECK-NEXT: sd a1, 408(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 593(a0)
+; CHECK-NEXT: sd a1, 448(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu t1, 843(a0)
+; CHECK-NEXT: lbu t4, 844(a0)
+; CHECK-NEXT: lbu s3, 845(a0)
+; CHECK-NEXT: lbu s6, 846(a0)
+; CHECK-NEXT: lbu a5, 586(a0)
+; CHECK-NEXT: lbu a6, 587(a0)
+; CHECK-NEXT: lbu t0, 588(a0)
+; CHECK-NEXT: lbu t3, 589(a0)
+; CHECK-NEXT: lbu a1, 878(a0)
+; CHECK-NEXT: sd a1, 1520(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 879(a0)
+; CHECK-NEXT: sd a1, 1400(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 880(a0)
+; CHECK-NEXT: sd a1, 1424(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 881(a0)
+; CHECK-NEXT: sd a1, 1296(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 830(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -24(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 831(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -16(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 832(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -8(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a4, 842(a0)
+; CHECK-NEXT: lbu a1, 598(a0)
+; CHECK-NEXT: sd a1, 512(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 599(a0)
+; CHECK-NEXT: sd a1, 528(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 600(a0)
+; CHECK-NEXT: sd a1, 320(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 601(a0)
+; CHECK-NEXT: sd a1, 344(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 851(a0)
+; CHECK-NEXT: sd a1, 376(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 852(a0)
+; CHECK-NEXT: sd a1, 504(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 853(a0)
+; CHECK-NEXT: sd a1, 520(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 854(a0)
+; CHECK-NEXT: sd a1, 424(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s9, 594(a0)
+; CHECK-NEXT: lbu s10, 595(a0)
+; CHECK-NEXT: lbu a1, 596(a0)
+; CHECK-NEXT: sd a1, 416(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 597(a0)
+; CHECK-NEXT: sd a1, 432(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a7, 847(a0)
+; CHECK-NEXT: lbu t2, 848(a0)
+; CHECK-NEXT: lbu s2, 849(a0)
+; CHECK-NEXT: lbu s7, 850(a0)
+; CHECK-NEXT: lbu a1, 855(a0)
+; CHECK-NEXT: sd a1, 352(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s4, 856(a0)
+; CHECK-NEXT: lbu s5, 857(a0)
+; CHECK-NEXT: lbu a1, 858(a0)
+; CHECK-NEXT: sd a1, 680(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 863(a0)
+; CHECK-NEXT: sd a1, 592(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 864(a0)
+; CHECK-NEXT: sd a1, 464(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 865(a0)
+; CHECK-NEXT: sd a1, 360(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 866(a0)
+; CHECK-NEXT: sd a1, 368(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 606(a0)
+; CHECK-NEXT: sd a1, 480(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 607(a0)
+; CHECK-NEXT: sd a1, 496(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 608(a0)
+; CHECK-NEXT: sd a1, 384(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 609(a0)
+; CHECK-NEXT: sd a1, 392(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 859(a0)
+; CHECK-NEXT: sd a1, 616(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 860(a0)
+; CHECK-NEXT: sd a1, 536(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 861(a0)
+; CHECK-NEXT: sd a1, 552(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 862(a0)
+; CHECK-NEXT: sd a1, 400(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 602(a0)
+; CHECK-NEXT: sd a1, 544(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 603(a0)
+; CHECK-NEXT: sd a1, 568(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 604(a0)
+; CHECK-NEXT: sd a1, 440(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 605(a0)
+; CHECK-NEXT: sd a1, 456(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 871(a0)
+; CHECK-NEXT: sd a1, 648(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 872(a0)
+; CHECK-NEXT: sd a1, 664(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 873(a0)
+; CHECK-NEXT: sd a1, 576(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 874(a0)
+; CHECK-NEXT: sd a1, 584(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 614(a0)
+; CHECK-NEXT: sd a1, 720(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 615(a0)
+; CHECK-NEXT: sd a1, 728(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 616(a0)
+; CHECK-NEXT: sd a1, 600(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 617(a0)
+; CHECK-NEXT: sd a1, 608(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 867(a0)
+; CHECK-NEXT: sd a1, 736(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 868(a0)
+; CHECK-NEXT: sd a1, 744(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 869(a0)
+; CHECK-NEXT: sd a1, 624(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 870(a0)
+; CHECK-NEXT: sd a1, 632(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu t5, 610(a0)
+; CHECK-NEXT: lbu t6, 611(a0)
+; CHECK-NEXT: lbu a1, 612(a0)
+; CHECK-NEXT: sd a1, 656(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 613(a0)
+; CHECK-NEXT: sd a1, 672(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 622(a0)
+; CHECK-NEXT: sd a1, 824(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 623(a0)
+; CHECK-NEXT: sd a1, 840(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 624(a0)
+; CHECK-NEXT: sd a1, 760(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 625(a0)
+; CHECK-NEXT: sd a1, 768(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 875(a0)
+; CHECK-NEXT: sd a1, 816(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 876(a0)
+; CHECK-NEXT: sd a1, 848(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 877(a0)
+; CHECK-NEXT: sd a1, 776(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu ra, 618(a0)
+; CHECK-NEXT: lbu a1, 619(a0)
+; CHECK-NEXT: sd a1, 336(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 620(a0)
+; CHECK-NEXT: sd a1, 792(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 621(a0)
+; CHECK-NEXT: sd a1, 808(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 886(a0)
+; CHECK-NEXT: sd a1, 1000(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 887(a0)
+; CHECK-NEXT: sd a1, 912(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 888(a0)
+; CHECK-NEXT: sd a1, 936(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 889(a0)
+; CHECK-NEXT: sd a1, 832(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 630(a0)
+; CHECK-NEXT: sd a1, 960(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 631(a0)
+; CHECK-NEXT: sd a1, 968(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 632(a0)
+; CHECK-NEXT: sd a1, 864(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 633(a0)
+; CHECK-NEXT: sd a1, 888(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 882(a0)
+; CHECK-NEXT: sd a1, 560(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 883(a0)
+; CHECK-NEXT: sd a1, 944(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 884(a0)
+; CHECK-NEXT: sd a1, 952(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 885(a0)
+; CHECK-NEXT: sd a1, 880(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 626(a0)
+; CHECK-NEXT: sd a1, 472(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 627(a0)
+; CHECK-NEXT: sd a1, 488(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 628(a0)
+; CHECK-NEXT: sd a1, 896(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 629(a0)
+; CHECK-NEXT: sd a1, 928(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 894(a0)
+; CHECK-NEXT: sd a1, 1224(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 895(a0)
+; CHECK-NEXT: sd a1, 1056(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 896(a0)
+; CHECK-NEXT: sd a1, 1072(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 897(a0)
+; CHECK-NEXT: sd a1, 976(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 638(a0)
+; CHECK-NEXT: sd a1, 1112(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 639(a0)
+; CHECK-NEXT: sd a1, 1152(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 640(a0)
+; CHECK-NEXT: sd a1, 1008(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 641(a0)
+; CHECK-NEXT: sd a1, 1016(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 634(a0)
+; CHECK-NEXT: sd a1, 696(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 635(a0)
+; CHECK-NEXT: sd a1, 712(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 636(a0)
+; CHECK-NEXT: sd a1, 1080(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 637(a0)
+; CHECK-NEXT: sd a1, 1088(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 890(a0)
+; CHECK-NEXT: sd a1, 640(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 891(a0)
+; CHECK-NEXT: sd a1, 1032(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 892(a0)
+; CHECK-NEXT: sd a1, 1064(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 893(a0)
+; CHECK-NEXT: sd a1, 992(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 642(a0)
+; CHECK-NEXT: sd a1, 856(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 643(a0)
+; CHECK-NEXT: sd a1, 872(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 644(a0)
+; CHECK-NEXT: sd a1, 784(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 645(a0)
+; CHECK-NEXT: sd a1, 800(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 650(a0)
+; CHECK-NEXT: sd a1, 1176(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 651(a0)
+; CHECK-NEXT: sd a1, 1200(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 652(a0)
+; CHECK-NEXT: sd a1, 1024(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 653(a0)
+; CHECK-NEXT: sd a1, 1048(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 902(a0)
+; CHECK-NEXT: sd a1, 1336(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 903(a0)
+; CHECK-NEXT: sd a1, 1192(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 904(a0)
+; CHECK-NEXT: sd a1, 1216(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 905(a0)
+; CHECK-NEXT: sd a1, 1040(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 646(a0)
+; CHECK-NEXT: sd a1, 1264(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 647(a0)
+; CHECK-NEXT: sd a1, 1288(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 648(a0)
+; CHECK-NEXT: sd a1, 1104(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 649(a0)
+; CHECK-NEXT: sd a1, 1144(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 898(a0)
+; CHECK-NEXT: sd a1, 752(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 899(a0)
+; CHECK-NEXT: sd a1, 688(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 900(a0)
+; CHECK-NEXT: sd a1, 704(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 901(a0)
+; CHECK-NEXT: sd a1, 1136(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 906(a0)
+; CHECK-NEXT: sd a1, 984(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 907(a0)
+; CHECK-NEXT: sd a1, 904(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 908(a0)
+; CHECK-NEXT: sd a1, 920(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 909(a0)
+; CHECK-NEXT: sd a1, 1472(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 914(a0)
+; CHECK-NEXT: sd a1, 1328(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 915(a0)
+; CHECK-NEXT: sd a1, 1184(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 916(a0)
+; CHECK-NEXT: sd a1, 1208(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 917(a0)
+; CHECK-NEXT: sd a1, 1744(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 658(a0)
+; CHECK-NEXT: sd a1, 1256(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 659(a0)
+; CHECK-NEXT: sd a1, 1280(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 660(a0)
+; CHECK-NEXT: sd a1, 1096(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 661(a0)
+; CHECK-NEXT: sd a1, 1128(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 910(a0)
+; CHECK-NEXT: sd a1, 1392(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 911(a0)
+; CHECK-NEXT: sd a1, 1272(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 912(a0)
+; CHECK-NEXT: sd a1, 1304(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 913(a0)
+; CHECK-NEXT: sd a1, 1120(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 654(a0)
+; CHECK-NEXT: sd a1, 1320(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 655(a0)
+; CHECK-NEXT: sd a1, 1360(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 656(a0)
+; CHECK-NEXT: sd a1, 1232(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 657(a0)
+; CHECK-NEXT: sd a1, 1248(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 922(a0)
+; CHECK-NEXT: sd a1, 1512(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 923(a0)
+; CHECK-NEXT: sd a1, 1368(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 924(a0)
+; CHECK-NEXT: sd a1, 1384(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 925(a0)
+; CHECK-NEXT: sd a1, 1880(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 666(a0)
+; CHECK-NEXT: sd a1, 1440(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 667(a0)
+; CHECK-NEXT: sd a1, 1464(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 668(a0)
+; CHECK-NEXT: sd a1, 1312(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 669(a0)
+; CHECK-NEXT: sd a1, 1352(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 918(a0)
+; CHECK-NEXT: sd a1, 1552(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 919(a0)
+; CHECK-NEXT: sd a1, 1456(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 920(a0)
+; CHECK-NEXT: sd a1, 1480(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 921(a0)
+; CHECK-NEXT: sd a1, 1344(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 662(a0)
+; CHECK-NEXT: sd a1, 1496(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 663(a0)
+; CHECK-NEXT: sd a1, 1504(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 664(a0)
+; CHECK-NEXT: sd a1, 1416(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 665(a0)
+; CHECK-NEXT: sd a1, 1432(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 930(a0)
+; CHECK-NEXT: sd a1, 1704(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 931(a0)
+; CHECK-NEXT: sd a1, 1576(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 932(a0)
+; CHECK-NEXT: sd a1, 1584(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 933(a0)
+; CHECK-NEXT: sd a1, 1488(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 674(a0)
+; CHECK-NEXT: sd a1, 1616(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 675(a0)
+; CHECK-NEXT: sd a1, 1640(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 676(a0)
+; CHECK-NEXT: sd a1, 1528(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 677(a0)
+; CHECK-NEXT: sd a1, 1544(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 926(a0)
+; CHECK-NEXT: sd a1, 1720(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 927(a0)
+; CHECK-NEXT: sd a1, 1632(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 928(a0)
+; CHECK-NEXT: sd a1, 1656(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 929(a0)
+; CHECK-NEXT: sd a1, 1536(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 670(a0)
+; CHECK-NEXT: sd a1, 1672(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 671(a0)
+; CHECK-NEXT: sd a1, 1688(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 672(a0)
+; CHECK-NEXT: sd a1, 1592(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 673(a0)
+; CHECK-NEXT: sd a1, 1608(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 938(a0)
+; CHECK-NEXT: sd a1, 1832(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 939(a0)
+; CHECK-NEXT: sd a1, 1752(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 940(a0)
+; CHECK-NEXT: sd a1, 1760(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 941(a0)
+; CHECK-NEXT: sd a1, 1664(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 682(a0)
+; CHECK-NEXT: sd a1, 1792(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 683(a0)
+; CHECK-NEXT: sd a1, 1808(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 684(a0)
+; CHECK-NEXT: sd a1, 1712(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 685(a0)
+; CHECK-NEXT: sd a1, 1736(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 934(a0)
+; CHECK-NEXT: sd a1, 1240(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 935(a0)
+; CHECK-NEXT: sd a1, 1800(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 936(a0)
+; CHECK-NEXT: sd a1, 1816(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 937(a0)
+; CHECK-NEXT: sd a1, 1728(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 678(a0)
+; CHECK-NEXT: sd a1, 1160(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 679(a0)
+; CHECK-NEXT: sd a1, 1168(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 680(a0)
+; CHECK-NEXT: sd a1, 1768(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 681(a0)
+; CHECK-NEXT: sd a1, 1776(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 946(a0)
+; CHECK-NEXT: sd a1, 1944(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 947(a0)
+; CHECK-NEXT: sd a1, 1856(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 948(a0)
+; CHECK-NEXT: sd a1, 1872(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 949(a0)
+; CHECK-NEXT: sd a1, 1784(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 690(a0)
+; CHECK-NEXT: sd a1, 1904(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 691(a0)
+; CHECK-NEXT: sd a1, 1920(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 692(a0)
+; CHECK-NEXT: sd a1, 1824(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 693(a0)
+; CHECK-NEXT: sd a1, 1848(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 942(a0)
+; CHECK-NEXT: sd a1, 1448(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 943(a0)
+; CHECK-NEXT: sd a1, 1896(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 944(a0)
+; CHECK-NEXT: sd a1, 1912(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 945(a0)
+; CHECK-NEXT: sd a1, 1840(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 686(a0)
+; CHECK-NEXT: sd a1, 1376(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 687(a0)
+; CHECK-NEXT: sd a1, 1408(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 688(a0)
+; CHECK-NEXT: sd a1, 1864(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 689(a0)
+; CHECK-NEXT: sd a1, 1888(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 954(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1992(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 955(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1976(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 956(a0)
+; CHECK-NEXT: sd a1, 1952(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 957(a0)
+; CHECK-NEXT: sd a1, 1976(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 698(a0)
+; CHECK-NEXT: sd a1, 2016(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 699(a0)
+; CHECK-NEXT: sd a1, 2040(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 700(a0)
+; CHECK-NEXT: sd a1, 1928(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 701(a0)
+; CHECK-NEXT: sd a1, 1936(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 950(a0)
+; CHECK-NEXT: sd a1, 1600(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 951(a0)
+; CHECK-NEXT: sd a1, 2024(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 952(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2032(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 953(a0)
+; CHECK-NEXT: sd a1, 1968(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 694(a0)
+; CHECK-NEXT: sd a1, 1560(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 695(a0)
+; CHECK-NEXT: sd a1, 1568(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 696(a0)
+; CHECK-NEXT: sd a1, 1960(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 697(a0)
+; CHECK-NEXT: sd a1, 1984(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 966(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2000(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 967(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1984(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 968(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1904(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 710(a0)
+; CHECK-NEXT: sd a1, 2032(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 711(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2040(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 712(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1912(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 706(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1936(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 707(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1920(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 962(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1944(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 963(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1928(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 964(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2048(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 965(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2024(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 708(a0)
+; CHECK-NEXT: sd a1, 2000(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 709(a0)
+; CHECK-NEXT: sd a1, 2008(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 702(a0)
+; CHECK-NEXT: sd a1, 1680(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 703(a0)
+; CHECK-NEXT: sd a1, 1696(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 704(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1968(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 705(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1960(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 958(a0)
+; CHECK-NEXT: sd a1, 1624(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 959(a0)
+; CHECK-NEXT: sd a1, 1648(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 960(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2016(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 961(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -2008(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 713(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1952(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 718(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1816(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 719(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1808(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 720(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1864(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 721(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1856(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 970(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1704(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 971(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1696(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 972(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1800(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 973(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1792(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 714(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1752(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 715(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1744(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 716(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1848(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 717(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1840(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 969(a0)
+; CHECK-NEXT: sd a1, 1992(sp) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 974(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1880(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 975(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1872(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 976(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1896(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 977(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1888(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 982(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1680(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 983(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1656(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 984(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1784(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 985(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1768(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 726(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1736(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 727(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1728(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 728(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1832(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 729(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1824(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 978(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1600(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 979(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1576(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 980(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1720(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 981(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1712(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 722(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1664(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 723(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1640(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 724(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1776(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 725(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1760(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 990(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1512(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 991(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1488(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 992(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1624(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 993(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1608(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 734(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1560(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 735(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1552(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 736(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1688(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 737(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1672(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 986(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1464(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 987(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1432(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 988(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1544(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 989(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1536(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 730(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1528(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 731(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1496(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 732(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1616(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 733(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1584(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 998(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1352(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 999(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1344(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1000(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1472(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1001(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1440(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 742(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1416(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 743(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1400(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 744(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1520(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 745(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1504(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 994(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1328(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 995(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1312(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 996(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1384(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 997(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1376(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 738(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1368(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 739(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1360(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 740(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1448(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 741(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1424(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1006(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1176(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1007(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1168(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1008(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1288(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1009(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1264(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 750(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1240(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 751(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1232(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 752(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1336(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 753(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1320(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1002(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1152(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1003(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1136(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1004(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1224(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1005(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1216(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 746(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1208(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 747(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1192(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 748(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1272(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 749(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1248(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1014(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1040(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1015(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1024(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1016(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1128(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1017(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1112(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 758(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1096(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 759(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1088(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 760(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1160(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 761(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1144(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1010(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1592(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1011(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1568(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1012(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1072(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1013(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1056(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 754(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1648(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 755(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1632(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 756(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1120(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 757(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1104(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1022(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -912(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1023(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -896(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1024(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -992(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1025(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -976(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 766(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -968(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 767(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -952(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 768(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1048(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 769(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1032(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1018(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1408(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1019(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1392(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1020(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -960(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1021(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -936(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 762(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1480(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 763(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1456(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 764(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1000(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 765(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -984(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1030(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -752(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1031(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -736(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1032(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -864(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1033(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -848(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 774(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -816(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 775(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -800(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 776(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -920(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 777(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -904(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 770(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1280(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 771(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1256(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 772(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -840(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 773(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -824(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1026(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1304(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1027(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1296(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1028(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -872(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1029(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -856(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 778(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1080(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 779(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1064(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 780(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -520(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 781(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -488(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 786(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -784(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 787(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -768(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 788(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -888(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 789(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -880(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1038(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -640(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1039(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -624(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1040(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -760(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1041(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -744(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 782(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -696(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 783(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -672(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 784(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -832(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 785(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -808(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1034(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1200(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1035(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1184(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1036(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -720(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1037(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -688(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1042(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -944(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1043(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -928(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1044(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1016(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1045(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -1008(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1050(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -592(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1051(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -568(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1052(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -728(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1053(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -704(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 794(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -664(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 795(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -656(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 796(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -792(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 797(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -776(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1046(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -528(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1047(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -496(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1048(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -648(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1049(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -632(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 790(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -576(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 791(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -560(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 792(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -712(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 793(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -680(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1058(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -424(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1059(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -400(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1060(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -552(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1061(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -536(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 802(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -472(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 803(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -464(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 804(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -600(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 805(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -584(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1054(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -384(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1055(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -360(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1056(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -456(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1057(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -448(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 798(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -440(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 799(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -408(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 800(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -544(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 801(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -504(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1066(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -296(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1067(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -288(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1068(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -392(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1069(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -368(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 810(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -344(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 811(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -336(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 812(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -432(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 813(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -416(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1062(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -272(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1063(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -256(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1064(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -328(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1065(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -320(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 806(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -312(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 807(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -304(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 808(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -376(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 809(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -352(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1074(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -152(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1075(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -144(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1076(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -240(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1077(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -216(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 818(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -200(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 819(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -192(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 820(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -280(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 821(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -264(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1070(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -128(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1071(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -112(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1072(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -184(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1073(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -176(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 814(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -168(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 815(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -160(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 816(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -224(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 817(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -208(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1082(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -40(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1083(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -32(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1084(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -88(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1085(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -80(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 826(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -72(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 827(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -64(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 828(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -136(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 829(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -120(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1078(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -512(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1079(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -480(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1080(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -56(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1081(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -48(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1086(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -248(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1087(a0)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -232(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1091(a0)
+; CHECK-NEXT: lbu a2, 822(a0)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: sd a2, -616(s11) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a2, 823(a0)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: sd a2, -608(s11) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a2, 824(a0)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: sd a2, -104(s11) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a2, 825(a0)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: sd a2, -96(s11) # 8-byte Folded Spill
+; CHECK-NEXT: sb a1, 0(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -819
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v2, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -827
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v6, (a1)
+; CHECK-NEXT: lbu a1, 836(a0)
+; CHECK-NEXT: lbu a2, 1092(a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li s11, 394
+; CHECK-NEXT: vslidedown.vx v26, v8, s11
+; CHECK-NEXT: li s11, 395
+; CHECK-NEXT: vslidedown.vx v28, v8, s11
+; CHECK-NEXT: sb a1, 7(a3)
+; CHECK-NEXT: sb a2, 8(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -835
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v20, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -843
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 5
+; CHECK-NEXT: mv s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: vl2r.v v10, (a2) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lbu a1, 837(a0)
+; CHECK-NEXT: lbu a2, 1093(a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li s11, 392
+; CHECK-NEXT: vslidedown.vx v24, v8, s11
+; CHECK-NEXT: li s11, 393
+; CHECK-NEXT: vslidedown.vx v30, v8, s11
+; CHECK-NEXT: sb a1, 15(a3)
+; CHECK-NEXT: sb a2, 16(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -851
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v16, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -859
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v22, (a1)
+; CHECK-NEXT: lbu a1, 838(a0)
+; CHECK-NEXT: lbu a2, 1094(a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li s11, 390
+; CHECK-NEXT: vslidedown.vx v10, v8, s11
+; CHECK-NEXT: li s11, 391
+; CHECK-NEXT: vslidedown.vx v14, v8, s11
+; CHECK-NEXT: sb a1, 23(a3)
+; CHECK-NEXT: sb a2, 24(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -867
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v18, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -875
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v0, (a1)
+; CHECK-NEXT: lbu a1, 839(a0)
+; CHECK-NEXT: lbu a2, 1095(a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li s11, 388
+; CHECK-NEXT: vslidedown.vx v16, v8, s11
+; CHECK-NEXT: li s11, 389
+; CHECK-NEXT: vslidedown.vx v18, v8, s11
+; CHECK-NEXT: sb a1, 31(a3)
+; CHECK-NEXT: sb a2, 32(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -883
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a1, 386
+; CHECK-NEXT: vslidedown.vx v20, v8, a1
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -891
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv s11, a2
+; CHECK-NEXT: slli a2, a2, 4
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: vl2r.v v22, (a2) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v22, (a1)
+; CHECK-NEXT: vsetivli zero, 1, e8, m2, ta, ma
+; CHECK-NEXT: li a1, 387
+; CHECK-NEXT: vslidedown.vx v22, v8, a1
+; CHECK-NEXT: lbu a1, 840(a0)
+; CHECK-NEXT: lbu a2, 1096(a0)
+; CHECK-NEXT: li s11, 384
+; CHECK-NEXT: vslidedown.vx v6, v8, s11
+; CHECK-NEXT: li s11, 385
+; CHECK-NEXT: vslidedown.vx v8, v8, s11
+; CHECK-NEXT: sb a1, 39(a3)
+; CHECK-NEXT: sb a2, 40(a3)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -899
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: mv s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: vl2r.v v4, (a2) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -907
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: mv s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: vl2r.v v4, (a2) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v4, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -915
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v12, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -923
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: csrr a2, vlenb
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: mv s11, a2
+; CHECK-NEXT: slli a2, a2, 3
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 1
+; CHECK-NEXT: add s11, s11, a2
+; CHECK-NEXT: slli a2, a2, 2
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: lui s11, 3
+; CHECK-NEXT: addiw s11, s11, -1120
+; CHECK-NEXT: add a2, a2, s11
+; CHECK-NEXT: vl2r.v v12, (a2) # vscale x 16-byte Folded Reload
+; CHECK-NEXT: vse8.v v12, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a5, 1026(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a4, 1027(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -931
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v28, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -939
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v26, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a6, 1034(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t1, 1035(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -947
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v30, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -955
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v24, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t0, 1042(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t4, 1043(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -963
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v14, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -971
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v10, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t3, 1050(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s3, 1051(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -979
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v18, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -987
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v16, (a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s8, 1058(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s6, 1059(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -995
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v22, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -1003
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v20, (a1)
+; CHECK-NEXT: ld a1, 328(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1066(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a7, 1067(a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -1011
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v8, (a1)
+; CHECK-NEXT: lui a1, 2
+; CHECK-NEXT: addiw a1, a1, -1019
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: vse8.v v6, (a1)
+; CHECK-NEXT: ld a1, 408(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1074(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t2, 1075(a1)
+; CHECK-NEXT: ld a1, 448(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1082(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s2, 1083(a1)
+; CHECK-NEXT: ld a1, 320(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1138(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s4, 1139(a1)
+; CHECK-NEXT: ld a1, 344(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1146(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s5, 1147(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s9, 1090(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s7, 1091(a1)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb s10, 1098(a1)
+; CHECK-NEXT: ld a1, 376(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1099(a2)
+; CHECK-NEXT: ld a1, 512(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1122(a2)
+; CHECK-NEXT: ld a1, 424(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1123(a2)
+; CHECK-NEXT: ld a1, 528(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1130(a2)
+; CHECK-NEXT: ld a1, 352(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1131(a2)
+; CHECK-NEXT: ld a1, 416(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1106(a2)
+; CHECK-NEXT: ld a1, 504(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1107(a2)
+; CHECK-NEXT: ld a1, 432(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1114(a2)
+; CHECK-NEXT: ld a1, 520(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1115(a2)
+; CHECK-NEXT: ld a1, 360(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1211(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t5, 1218(a1)
+; CHECK-NEXT: ld a1, 368(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1219(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb t6, 1226(a1)
+; CHECK-NEXT: ld a1, 384(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1202(a2)
+; CHECK-NEXT: ld a1, 464(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1203(a2)
+; CHECK-NEXT: ld a1, 392(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1210(a2)
+; CHECK-NEXT: ld a1, 480(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1186(a2)
+; CHECK-NEXT: ld a1, 400(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1187(a2)
+; CHECK-NEXT: ld a1, 496(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1194(a2)
+; CHECK-NEXT: ld a1, 592(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1195(a2)
+; CHECK-NEXT: ld a1, 440(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1170(a2)
+; CHECK-NEXT: ld a1, 536(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1171(a2)
+; CHECK-NEXT: ld a1, 456(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1178(a2)
+; CHECK-NEXT: ld a1, 552(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1179(a2)
+; CHECK-NEXT: ld a1, 544(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1154(a2)
+; CHECK-NEXT: ld a1, 680(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1155(a2)
+; CHECK-NEXT: ld a1, 568(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1162(a2)
+; CHECK-NEXT: ld a1, 616(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1163(a2)
+; CHECK-NEXT: ld a1, 576(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1275(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb ra, 1282(a1)
+; CHECK-NEXT: ld a1, 584(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1283(a2)
+; CHECK-NEXT: ld a1, 336(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1290(a2)
+; CHECK-NEXT: ld a1, 648(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1259(a2)
+; CHECK-NEXT: ld a1, 600(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1266(a2)
+; CHECK-NEXT: ld a1, 664(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1267(a2)
+; CHECK-NEXT: ld a1, 608(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1274(a2)
+; CHECK-NEXT: ld a1, 624(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1243(a2)
+; CHECK-NEXT: ld a1, 720(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1250(a2)
+; CHECK-NEXT: ld a1, 632(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1251(a2)
+; CHECK-NEXT: ld a1, 728(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1258(a2)
+; CHECK-NEXT: ld a1, 736(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1227(a2)
+; CHECK-NEXT: ld a1, 656(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1234(a2)
+; CHECK-NEXT: ld a1, 744(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1235(a2)
+; CHECK-NEXT: ld a1, 672(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1242(a2)
+; CHECK-NEXT: ld a1, 1296(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1339(a2)
+; CHECK-NEXT: ld a1, 472(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1346(a2)
+; CHECK-NEXT: ld a1, 560(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1347(a2)
+; CHECK-NEXT: ld a1, 488(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1354(a2)
+; CHECK-NEXT: ld a1, 1400(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1323(a2)
+; CHECK-NEXT: ld a1, 760(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1330(a2)
+; CHECK-NEXT: ld a1, 1424(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1331(a2)
+; CHECK-NEXT: ld a1, 768(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1338(a2)
+; CHECK-NEXT: ld a1, 776(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1307(a2)
+; CHECK-NEXT: ld a1, 824(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1314(a2)
+; CHECK-NEXT: ld a1, 1520(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1315(a2)
+; CHECK-NEXT: ld a1, 840(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1322(a2)
+; CHECK-NEXT: ld a1, 816(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1291(a2)
+; CHECK-NEXT: ld a1, 792(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1298(a2)
+; CHECK-NEXT: ld a1, 848(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1299(a2)
+; CHECK-NEXT: ld a1, 808(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1306(a2)
+; CHECK-NEXT: ld a1, 832(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1403(a2)
+; CHECK-NEXT: ld a1, 696(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1410(a2)
+; CHECK-NEXT: ld a1, 640(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1411(a2)
+; CHECK-NEXT: ld a1, 712(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1418(a2)
+; CHECK-NEXT: ld a1, 912(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1387(a2)
+; CHECK-NEXT: ld a1, 864(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1394(a2)
+; CHECK-NEXT: ld a1, 936(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1395(a2)
+; CHECK-NEXT: ld a1, 888(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1402(a2)
+; CHECK-NEXT: ld a1, 880(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1371(a2)
+; CHECK-NEXT: ld a1, 960(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1378(a2)
+; CHECK-NEXT: ld a1, 1000(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1379(a2)
+; CHECK-NEXT: ld a1, 968(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1386(a2)
+; CHECK-NEXT: ld a1, 944(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1355(a2)
+; CHECK-NEXT: ld a1, 896(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1362(a2)
+; CHECK-NEXT: ld a1, 952(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1363(a2)
+; CHECK-NEXT: ld a1, 928(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1370(a2)
+; CHECK-NEXT: ld a1, 688(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1483(a2)
+; CHECK-NEXT: ld a1, 784(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1490(a2)
+; CHECK-NEXT: ld a1, 704(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1491(a2)
+; CHECK-NEXT: ld a1, 800(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1498(a2)
+; CHECK-NEXT: ld a1, 976(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1467(a2)
+; CHECK-NEXT: ld a1, 856(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1474(a2)
+; CHECK-NEXT: ld a1, 752(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1475(a2)
+; CHECK-NEXT: ld a1, 872(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1482(a2)
+; CHECK-NEXT: ld a1, 1056(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1451(a2)
+; CHECK-NEXT: ld a1, 1008(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1458(a2)
+; CHECK-NEXT: ld a1, 1072(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1459(a2)
+; CHECK-NEXT: ld a1, 1016(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1466(a2)
+; CHECK-NEXT: ld a1, 992(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1435(a2)
+; CHECK-NEXT: ld a1, 1112(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1442(a2)
+; CHECK-NEXT: ld a1, 1224(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1443(a2)
+; CHECK-NEXT: ld a1, 1152(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1450(a2)
+; CHECK-NEXT: ld a1, 1032(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1419(a2)
+; CHECK-NEXT: ld a1, 1080(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1426(a2)
+; CHECK-NEXT: ld a1, 1064(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1427(a2)
+; CHECK-NEXT: ld a1, 1088(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1434(a2)
+; CHECK-NEXT: ld a1, 904(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1547(a2)
+; CHECK-NEXT: ld a1, 1024(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1554(a2)
+; CHECK-NEXT: ld a1, 920(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1555(a2)
+; CHECK-NEXT: ld a1, 1048(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1562(a2)
+; CHECK-NEXT: ld a1, 1040(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1531(a2)
+; CHECK-NEXT: ld a1, 1176(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1538(a2)
+; CHECK-NEXT: ld a1, 984(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1539(a2)
+; CHECK-NEXT: ld a1, 1200(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1546(a2)
+; CHECK-NEXT: ld a1, 1192(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1515(a2)
+; CHECK-NEXT: ld a1, 1104(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1522(a2)
+; CHECK-NEXT: ld a1, 1216(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1523(a2)
+; CHECK-NEXT: ld a1, 1144(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1530(a2)
+; CHECK-NEXT: ld a1, 1136(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1499(a2)
+; CHECK-NEXT: ld a1, 1264(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1506(a2)
+; CHECK-NEXT: ld a1, 1336(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1507(a2)
+; CHECK-NEXT: ld a1, 1288(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1514(a2)
+; CHECK-NEXT: ld a1, 1184(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1611(a2)
+; CHECK-NEXT: ld a1, 1096(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1618(a2)
+; CHECK-NEXT: ld a1, 1208(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1619(a2)
+; CHECK-NEXT: ld a1, 1128(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1626(a2)
+; CHECK-NEXT: ld a1, 1120(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1595(a2)
+; CHECK-NEXT: ld a1, 1256(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1602(a2)
+; CHECK-NEXT: ld a1, 1328(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1603(a2)
+; CHECK-NEXT: ld a1, 1280(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1610(a2)
+; CHECK-NEXT: ld a1, 1272(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1579(a2)
+; CHECK-NEXT: ld a1, 1232(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1586(a2)
+; CHECK-NEXT: ld a1, 1304(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1587(a2)
+; CHECK-NEXT: ld a1, 1248(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1594(a2)
+; CHECK-NEXT: ld a1, 1472(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1563(a2)
+; CHECK-NEXT: ld a1, 1320(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1570(a2)
+; CHECK-NEXT: ld a1, 1392(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1571(a2)
+; CHECK-NEXT: ld a1, 1360(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1578(a2)
+; CHECK-NEXT: ld a1, 1368(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1675(a2)
+; CHECK-NEXT: ld a1, 1312(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1682(a2)
+; CHECK-NEXT: ld a1, 1384(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1683(a2)
+; CHECK-NEXT: ld a1, 1352(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1690(a2)
+; CHECK-NEXT: ld a1, 1344(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1659(a2)
+; CHECK-NEXT: ld a1, 1440(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1666(a2)
+; CHECK-NEXT: ld a1, 1512(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1667(a2)
+; CHECK-NEXT: ld a1, 1464(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1674(a2)
+; CHECK-NEXT: ld a1, 1456(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1643(a2)
+; CHECK-NEXT: ld a1, 1416(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1650(a2)
+; CHECK-NEXT: ld a1, 1480(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1651(a2)
+; CHECK-NEXT: ld a1, 1432(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1658(a2)
+; CHECK-NEXT: ld a1, 1744(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1627(a2)
+; CHECK-NEXT: ld a1, 1496(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1634(a2)
+; CHECK-NEXT: ld a1, 1552(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1635(a2)
+; CHECK-NEXT: ld a1, 1504(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1642(a2)
+; CHECK-NEXT: ld a1, 1488(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1755(a2)
+; CHECK-NEXT: ld a1, 1160(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1762(a2)
+; CHECK-NEXT: ld a1, 1240(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1763(a2)
+; CHECK-NEXT: ld a1, 1168(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1770(a2)
+; CHECK-NEXT: ld a1, 1576(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1739(a2)
+; CHECK-NEXT: ld a1, 1528(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1746(a2)
+; CHECK-NEXT: ld a1, 1584(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1747(a2)
+; CHECK-NEXT: ld a1, 1544(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1754(a2)
+; CHECK-NEXT: ld a1, 1536(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1723(a2)
+; CHECK-NEXT: ld a1, 1616(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1730(a2)
+; CHECK-NEXT: ld a1, 1704(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1731(a2)
+; CHECK-NEXT: ld a1, 1640(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1738(a2)
+; CHECK-NEXT: ld a1, 1632(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1707(a2)
+; CHECK-NEXT: ld a1, 1592(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1714(a2)
+; CHECK-NEXT: ld a1, 1656(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1715(a2)
+; CHECK-NEXT: ld a1, 1608(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1722(a2)
+; CHECK-NEXT: ld a1, 1880(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1691(a2)
+; CHECK-NEXT: ld a1, 1672(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1698(a2)
+; CHECK-NEXT: ld a1, 1720(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1699(a2)
+; CHECK-NEXT: ld a1, 1688(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1706(a2)
+; CHECK-NEXT: ld a1, 1664(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1819(a2)
+; CHECK-NEXT: ld a1, 1376(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1826(a2)
+; CHECK-NEXT: ld a1, 1448(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1827(a2)
+; CHECK-NEXT: ld a1, 1408(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1834(a2)
+; CHECK-NEXT: ld a1, 1752(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1803(a2)
+; CHECK-NEXT: ld a1, 1712(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1810(a2)
+; CHECK-NEXT: ld a1, 1760(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1811(a2)
+; CHECK-NEXT: ld a1, 1736(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1818(a2)
+; CHECK-NEXT: ld a1, 1728(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1787(a2)
+; CHECK-NEXT: ld a1, 1792(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1794(a2)
+; CHECK-NEXT: ld a1, 1832(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1795(a2)
+; CHECK-NEXT: ld a1, 1808(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1802(a2)
+; CHECK-NEXT: ld a1, 1800(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1771(a2)
+; CHECK-NEXT: ld a1, 1768(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1778(a2)
+; CHECK-NEXT: ld a1, 1816(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1779(a2)
+; CHECK-NEXT: ld a1, 1776(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1786(a2)
+; CHECK-NEXT: ld a1, 1784(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1883(a2)
+; CHECK-NEXT: ld a1, 1560(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1890(a2)
+; CHECK-NEXT: ld a1, 1600(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1891(a2)
+; CHECK-NEXT: ld a1, 1568(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1898(a2)
+; CHECK-NEXT: ld a1, 1856(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1867(a2)
+; CHECK-NEXT: ld a1, 1824(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1874(a2)
+; CHECK-NEXT: ld a1, 1872(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1875(a2)
+; CHECK-NEXT: ld a1, 1848(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1882(a2)
+; CHECK-NEXT: ld a1, 1840(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1851(a2)
+; CHECK-NEXT: ld a1, 1904(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1858(a2)
+; CHECK-NEXT: ld a1, 1944(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1859(a2)
+; CHECK-NEXT: ld a1, 1920(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1866(a2)
+; CHECK-NEXT: ld a1, 1896(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1835(a2)
+; CHECK-NEXT: ld a1, 1864(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1842(a2)
+; CHECK-NEXT: ld a1, 1912(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1843(a2)
+; CHECK-NEXT: ld a1, 1888(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1850(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: addiw a1, a1, 1971
+; CHECK-NEXT: add a5, sp, a1
+; CHECK-NEXT: ld a1, 1680(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -17(a5)
+; CHECK-NEXT: ld a1, 1624(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -16(a5)
+; CHECK-NEXT: ld a1, 1696(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -9(a5)
+; CHECK-NEXT: ld a1, 1648(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -8(a5)
+; CHECK-NEXT: ld a1, 1928(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -33(a5)
+; CHECK-NEXT: ld a1, 1952(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -32(a5)
+; CHECK-NEXT: ld a1, 1936(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -25(a5)
+; CHECK-NEXT: ld a1, 1976(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -24(a5)
+; CHECK-NEXT: ld a1, 2016(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -49(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1992(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -48(a5)
+; CHECK-NEXT: ld a1, 2040(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -41(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1976(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -40(a5)
+; CHECK-NEXT: ld a1, 1968(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1915(a2)
+; CHECK-NEXT: ld a1, 2024(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1899(a2)
+; CHECK-NEXT: ld a1, 1960(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1906(a2)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2032(a1) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1907(a2)
+; CHECK-NEXT: ld a1, 1984(sp) # 8-byte Folded Reload
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 1914(a2)
+; CHECK-NEXT: ld a1, 2032(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 47(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2000(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 48(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2040(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 55(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1984(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 56(a5)
+; CHECK-NEXT: ld a1, 2000(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 31(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2048(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 32(a5)
+; CHECK-NEXT: ld a1, 2008(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 39(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2024(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 40(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1936(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 15(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1944(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 16(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1920(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 23(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1928(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 24(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1968(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, -1(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2016(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 0(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1960(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 7(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -2008(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 8(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1912(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 63(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -1904(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 64(a5)
+; CHECK-NEXT: lbu a1, 852(a5)
+; CHECK-NEXT: lbu a2, 597(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: ld a4, -1952(a4) # 8-byte Folded Reload
+; CHECK-NEXT: sb a4, 71(a5)
+; CHECK-NEXT: ld a4, 1992(sp) # 8-byte Folded Reload
+; CHECK-NEXT: sb a4, 72(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 63(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 70(a1)
+; CHECK-NEXT: lbu a1, 851(a5)
+; CHECK-NEXT: lbu a2, 596(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 55(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 62(a1)
+; CHECK-NEXT: lbu a1, 850(a5)
+; CHECK-NEXT: lbu a2, 595(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 47(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 54(a1)
+; CHECK-NEXT: lbu a1, 849(a5)
+; CHECK-NEXT: lbu a2, 594(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 39(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 46(a1)
+; CHECK-NEXT: lbu a1, 848(a5)
+; CHECK-NEXT: lbu a2, 593(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 31(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 38(a1)
+; CHECK-NEXT: lbu a1, 847(a5)
+; CHECK-NEXT: lbu a2, 592(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 23(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 30(a1)
+; CHECK-NEXT: lbu a1, 846(a5)
+; CHECK-NEXT: lbu a2, 591(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 15(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 22(a1)
+; CHECK-NEXT: lbu a1, 845(a5)
+; CHECK-NEXT: lbu a2, 590(a5)
+; CHECK-NEXT: lbu a4, 589(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 7(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 14(a1)
+; CHECK-NEXT: lbu a1, 861(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 6(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 135(a2)
+; CHECK-NEXT: lbu a1, 860(a5)
+; CHECK-NEXT: lbu a2, 605(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 127(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 134(a1)
+; CHECK-NEXT: lbu a1, 859(a5)
+; CHECK-NEXT: lbu a2, 604(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 119(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 126(a1)
+; CHECK-NEXT: lbu a1, 858(a5)
+; CHECK-NEXT: lbu a2, 603(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 111(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 118(a1)
+; CHECK-NEXT: lbu a1, 857(a5)
+; CHECK-NEXT: lbu a2, 602(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 103(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 110(a1)
+; CHECK-NEXT: lbu a1, 856(a5)
+; CHECK-NEXT: lbu a2, 601(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 95(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 102(a1)
+; CHECK-NEXT: lbu a1, 855(a5)
+; CHECK-NEXT: lbu a2, 600(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 87(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 94(a1)
+; CHECK-NEXT: lbu a1, 854(a5)
+; CHECK-NEXT: lbu a2, 599(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 79(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 86(a1)
+; CHECK-NEXT: lbu a1, 853(a5)
+; CHECK-NEXT: lbu a2, 598(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 71(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 78(a1)
+; CHECK-NEXT: lbu a1, 869(a5)
+; CHECK-NEXT: lbu a2, 614(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 199(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 206(a1)
+; CHECK-NEXT: lbu a1, 868(a5)
+; CHECK-NEXT: lbu a2, 613(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 191(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 198(a1)
+; CHECK-NEXT: lbu a1, 867(a5)
+; CHECK-NEXT: lbu a2, 612(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 183(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 190(a1)
+; CHECK-NEXT: lbu a1, 866(a5)
+; CHECK-NEXT: lbu a2, 611(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 175(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 182(a1)
+; CHECK-NEXT: lbu a1, 865(a5)
+; CHECK-NEXT: lbu a2, 610(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 167(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 174(a1)
+; CHECK-NEXT: lbu a1, 864(a5)
+; CHECK-NEXT: lbu a2, 609(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 159(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 166(a1)
+; CHECK-NEXT: lbu a1, 863(a5)
+; CHECK-NEXT: lbu a2, 608(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 151(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 158(a1)
+; CHECK-NEXT: lbu a1, 862(a5)
+; CHECK-NEXT: lbu a2, 607(a5)
+; CHECK-NEXT: lbu a4, 606(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 143(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 150(a1)
+; CHECK-NEXT: lbu a1, 878(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 142(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 271(a2)
+; CHECK-NEXT: lbu a1, 877(a5)
+; CHECK-NEXT: lbu a2, 622(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 263(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 270(a1)
+; CHECK-NEXT: lbu a1, 876(a5)
+; CHECK-NEXT: lbu a2, 621(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 255(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 262(a1)
+; CHECK-NEXT: lbu a1, 875(a5)
+; CHECK-NEXT: lbu a2, 620(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 247(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 254(a1)
+; CHECK-NEXT: lbu a1, 874(a5)
+; CHECK-NEXT: lbu a2, 619(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 239(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 246(a1)
+; CHECK-NEXT: lbu a1, 873(a5)
+; CHECK-NEXT: lbu a2, 618(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 231(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 238(a1)
+; CHECK-NEXT: lbu a1, 872(a5)
+; CHECK-NEXT: lbu a2, 617(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 223(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 230(a1)
+; CHECK-NEXT: lbu a1, 871(a5)
+; CHECK-NEXT: lbu a2, 616(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 215(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 222(a1)
+; CHECK-NEXT: lbu a1, 870(a5)
+; CHECK-NEXT: lbu a2, 615(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 207(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 214(a1)
+; CHECK-NEXT: lbu a1, 886(a5)
+; CHECK-NEXT: lbu a2, 631(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 335(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 342(a1)
+; CHECK-NEXT: lbu a1, 885(a5)
+; CHECK-NEXT: lbu a2, 630(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 327(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 334(a1)
+; CHECK-NEXT: lbu a1, 884(a5)
+; CHECK-NEXT: lbu a2, 629(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 319(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 326(a1)
+; CHECK-NEXT: lbu a1, 883(a5)
+; CHECK-NEXT: lbu a2, 628(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 311(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 318(a1)
+; CHECK-NEXT: lbu a1, 882(a5)
+; CHECK-NEXT: lbu a2, 627(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 303(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 310(a1)
+; CHECK-NEXT: lbu a1, 881(a5)
+; CHECK-NEXT: lbu a2, 626(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 295(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 302(a1)
+; CHECK-NEXT: lbu a1, 880(a5)
+; CHECK-NEXT: lbu a2, 625(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 287(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 294(a1)
+; CHECK-NEXT: lbu a1, 879(a5)
+; CHECK-NEXT: lbu a2, 624(a5)
+; CHECK-NEXT: lbu a4, 623(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 279(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 286(a1)
+; CHECK-NEXT: lbu a1, 895(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 278(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 407(a2)
+; CHECK-NEXT: lbu a1, 894(a5)
+; CHECK-NEXT: lbu a2, 639(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 399(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 406(a1)
+; CHECK-NEXT: lbu a1, 893(a5)
+; CHECK-NEXT: lbu a2, 638(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 391(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 398(a1)
+; CHECK-NEXT: lbu a1, 892(a5)
+; CHECK-NEXT: lbu a2, 637(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 383(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 390(a1)
+; CHECK-NEXT: lbu a1, 891(a5)
+; CHECK-NEXT: lbu a2, 636(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 375(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 382(a1)
+; CHECK-NEXT: lbu a1, 890(a5)
+; CHECK-NEXT: lbu a2, 635(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 367(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 374(a1)
+; CHECK-NEXT: lbu a1, 889(a5)
+; CHECK-NEXT: lbu a2, 634(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 359(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 366(a1)
+; CHECK-NEXT: lbu a1, 888(a5)
+; CHECK-NEXT: lbu a2, 633(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 351(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 358(a1)
+; CHECK-NEXT: lbu a1, 887(a5)
+; CHECK-NEXT: lbu a2, 632(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 343(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 350(a1)
+; CHECK-NEXT: lbu a1, 903(a5)
+; CHECK-NEXT: lbu a2, 648(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 471(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 478(a1)
+; CHECK-NEXT: lbu a1, 902(a5)
+; CHECK-NEXT: lbu a2, 647(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 463(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 470(a1)
+; CHECK-NEXT: lbu a1, 901(a5)
+; CHECK-NEXT: lbu a2, 646(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 455(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 462(a1)
+; CHECK-NEXT: lbu a1, 900(a5)
+; CHECK-NEXT: lbu a2, 645(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 447(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 454(a1)
+; CHECK-NEXT: lbu a1, 899(a5)
+; CHECK-NEXT: lbu a2, 644(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 439(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 446(a1)
+; CHECK-NEXT: lbu a1, 898(a5)
+; CHECK-NEXT: lbu a2, 643(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 431(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 438(a1)
+; CHECK-NEXT: lbu a1, 897(a5)
+; CHECK-NEXT: lbu a2, 642(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 423(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 430(a1)
+; CHECK-NEXT: lbu a1, 896(a5)
+; CHECK-NEXT: lbu a2, 641(a5)
+; CHECK-NEXT: lbu a4, 640(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 415(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 422(a1)
+; CHECK-NEXT: lbu a1, 912(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 414(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 543(a2)
+; CHECK-NEXT: lbu a1, 911(a5)
+; CHECK-NEXT: lbu a2, 656(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 535(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 542(a1)
+; CHECK-NEXT: lbu a1, 910(a5)
+; CHECK-NEXT: lbu a2, 655(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 527(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 534(a1)
+; CHECK-NEXT: lbu a1, 909(a5)
+; CHECK-NEXT: lbu a2, 654(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 519(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 526(a1)
+; CHECK-NEXT: lbu a1, 908(a5)
+; CHECK-NEXT: lbu a2, 653(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 511(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 518(a1)
+; CHECK-NEXT: lbu a1, 907(a5)
+; CHECK-NEXT: lbu a2, 652(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 503(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 510(a1)
+; CHECK-NEXT: lbu a1, 906(a5)
+; CHECK-NEXT: lbu a2, 651(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 495(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 502(a1)
+; CHECK-NEXT: lbu a1, 905(a5)
+; CHECK-NEXT: lbu a2, 650(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 487(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 494(a1)
+; CHECK-NEXT: lbu a1, 904(a5)
+; CHECK-NEXT: lbu a2, 649(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 479(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 486(a1)
+; CHECK-NEXT: lbu a1, 920(a5)
+; CHECK-NEXT: lbu a2, 665(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 607(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 614(a1)
+; CHECK-NEXT: lbu a1, 919(a5)
+; CHECK-NEXT: lbu a2, 664(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 599(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 606(a1)
+; CHECK-NEXT: lbu a1, 918(a5)
+; CHECK-NEXT: lbu a2, 663(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 591(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 598(a1)
+; CHECK-NEXT: lbu a1, 917(a5)
+; CHECK-NEXT: lbu a2, 662(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 583(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 590(a1)
+; CHECK-NEXT: lbu a1, 916(a5)
+; CHECK-NEXT: lbu a2, 661(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 575(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 582(a1)
+; CHECK-NEXT: lbu a1, 915(a5)
+; CHECK-NEXT: lbu a2, 660(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 567(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 574(a1)
+; CHECK-NEXT: lbu a1, 914(a5)
+; CHECK-NEXT: lbu a2, 659(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 559(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 566(a1)
+; CHECK-NEXT: lbu a1, 913(a5)
+; CHECK-NEXT: lbu a2, 658(a5)
+; CHECK-NEXT: lbu a4, 657(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 551(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 558(a1)
+; CHECK-NEXT: lbu a1, 929(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 550(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 679(a2)
+; CHECK-NEXT: lbu a1, 928(a5)
+; CHECK-NEXT: lbu a2, 673(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 671(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 678(a1)
+; CHECK-NEXT: lbu a1, 927(a5)
+; CHECK-NEXT: lbu a2, 672(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 663(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 670(a1)
+; CHECK-NEXT: lbu a1, 926(a5)
+; CHECK-NEXT: lbu a2, 671(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 655(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 662(a1)
+; CHECK-NEXT: lbu a1, 925(a5)
+; CHECK-NEXT: lbu a2, 670(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 647(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 654(a1)
+; CHECK-NEXT: lbu a1, 924(a5)
+; CHECK-NEXT: lbu a2, 669(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 639(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 646(a1)
+; CHECK-NEXT: lbu a1, 923(a5)
+; CHECK-NEXT: lbu a2, 668(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 631(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 638(a1)
+; CHECK-NEXT: lbu a1, 922(a5)
+; CHECK-NEXT: lbu a2, 667(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 623(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 630(a1)
+; CHECK-NEXT: lbu a1, 921(a5)
+; CHECK-NEXT: lbu a2, 666(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 615(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 622(a1)
+; CHECK-NEXT: lbu a1, 937(a5)
+; CHECK-NEXT: lbu a2, 682(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 743(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 750(a1)
+; CHECK-NEXT: lbu a1, 936(a5)
+; CHECK-NEXT: lbu a2, 681(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 735(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 742(a1)
+; CHECK-NEXT: lbu a1, 935(a5)
+; CHECK-NEXT: lbu a2, 680(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 727(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 734(a1)
+; CHECK-NEXT: lbu a1, 934(a5)
+; CHECK-NEXT: lbu a2, 679(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 719(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 726(a1)
+; CHECK-NEXT: lbu a1, 933(a5)
+; CHECK-NEXT: lbu a2, 678(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 711(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 718(a1)
+; CHECK-NEXT: lbu a1, 932(a5)
+; CHECK-NEXT: lbu a2, 677(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 703(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 710(a1)
+; CHECK-NEXT: lbu a1, 931(a5)
+; CHECK-NEXT: lbu a2, 676(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 695(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 702(a1)
+; CHECK-NEXT: lbu a1, 930(a5)
+; CHECK-NEXT: lbu a2, 675(a5)
+; CHECK-NEXT: lbu a4, 674(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 687(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 694(a1)
+; CHECK-NEXT: lbu a1, 946(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 686(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 815(a2)
+; CHECK-NEXT: lbu a1, 945(a5)
+; CHECK-NEXT: lbu a2, 690(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 807(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 814(a1)
+; CHECK-NEXT: lbu a1, 944(a5)
+; CHECK-NEXT: lbu a2, 689(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 799(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 806(a1)
+; CHECK-NEXT: lbu a1, 943(a5)
+; CHECK-NEXT: lbu a2, 688(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 791(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 798(a1)
+; CHECK-NEXT: lbu a1, 942(a5)
+; CHECK-NEXT: lbu a2, 687(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 783(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 790(a1)
+; CHECK-NEXT: lbu a1, 941(a5)
+; CHECK-NEXT: lbu a2, 686(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 775(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 782(a1)
+; CHECK-NEXT: lbu a1, 940(a5)
+; CHECK-NEXT: lbu a2, 685(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 767(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 774(a1)
+; CHECK-NEXT: lbu a1, 939(a5)
+; CHECK-NEXT: lbu a2, 684(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 759(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 766(a1)
+; CHECK-NEXT: lbu a1, 938(a5)
+; CHECK-NEXT: lbu a2, 683(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 751(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 758(a1)
+; CHECK-NEXT: lbu a1, 954(a5)
+; CHECK-NEXT: lbu a2, 699(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 879(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 886(a1)
+; CHECK-NEXT: lbu a1, 953(a5)
+; CHECK-NEXT: lbu a2, 698(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 871(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 878(a1)
+; CHECK-NEXT: lbu a1, 952(a5)
+; CHECK-NEXT: lbu a2, 697(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 863(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 870(a1)
+; CHECK-NEXT: lbu a1, 951(a5)
+; CHECK-NEXT: lbu a2, 696(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 855(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 862(a1)
+; CHECK-NEXT: lbu a1, 950(a5)
+; CHECK-NEXT: lbu a2, 695(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 847(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 854(a1)
+; CHECK-NEXT: lbu a1, 949(a5)
+; CHECK-NEXT: lbu a2, 694(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 839(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 846(a1)
+; CHECK-NEXT: lbu a1, 948(a5)
+; CHECK-NEXT: lbu a2, 693(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 831(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 838(a1)
+; CHECK-NEXT: lbu a1, 947(a5)
+; CHECK-NEXT: lbu a2, 692(a5)
+; CHECK-NEXT: lbu a4, 691(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: sb a1, 823(a6)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 830(a1)
+; CHECK-NEXT: lbu a1, 963(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a4, 822(a2)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sb a1, 951(a2)
+; CHECK-NEXT: lbu a1, 962(a5)
+; CHECK-NEXT: lbu a2, 707(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 943(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 950(a1)
+; CHECK-NEXT: lbu a1, 961(a5)
+; CHECK-NEXT: lbu a2, 706(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 935(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 942(a1)
+; CHECK-NEXT: lbu a1, 960(a5)
+; CHECK-NEXT: lbu a2, 705(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 927(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 934(a1)
+; CHECK-NEXT: lbu a1, 959(a5)
+; CHECK-NEXT: lbu a2, 704(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 919(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 926(a1)
+; CHECK-NEXT: lbu a1, 958(a5)
+; CHECK-NEXT: lbu a2, 703(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 911(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 918(a1)
+; CHECK-NEXT: lbu a1, 957(a5)
+; CHECK-NEXT: lbu a2, 702(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 903(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 910(a1)
+; CHECK-NEXT: lbu a1, 956(a5)
+; CHECK-NEXT: lbu a2, 701(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 895(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 902(a1)
+; CHECK-NEXT: lbu a1, 955(a5)
+; CHECK-NEXT: lbu a2, 700(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 887(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 894(a1)
+; CHECK-NEXT: lbu a1, 971(a5)
+; CHECK-NEXT: lbu a2, 716(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 1015(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 1022(a1)
+; CHECK-NEXT: lbu a1, 970(a5)
+; CHECK-NEXT: lbu a2, 715(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sb a1, 1007(a4)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sb a2, 1014(a1)
+; CHECK-NEXT: lbu a4, 833(a0)
+; CHECK-NEXT: lbu a1, 834(a0)
+; CHECK-NEXT: lbu a2, 835(a0)
+; CHECK-NEXT: lbu t1, 714(a5)
+; CHECK-NEXT: lbu t0, 1088(a0)
+; CHECK-NEXT: lbu a7, 1089(a0)
+; CHECK-NEXT: lbu a6, 1090(a0)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sb t1, 1006(t2)
+; CHECK-NEXT: lbu t1, 841(a0)
+; CHECK-NEXT: sb t1, 47(a3)
+; CHECK-NEXT: lbu t1, 969(a5)
+; CHECK-NEXT: li t2, 1024
+; CHECK-NEXT: vsetvli zero, t2, e8, m4, ta, ma
+; CHECK-NEXT: li t2, 5
+; CHECK-NEXT: slli t2, t2, 10
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: vle8.v v8, (t2)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sb t1, 999(t2)
+; CHECK-NEXT: lbu t1, 968(a5)
+; CHECK-NEXT: lbu t2, 713(a5)
+; CHECK-NEXT: lui t3, 1
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: sb t1, 991(t3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: sb t2, 998(t1)
+; CHECK-NEXT: lbu t1, 967(a5)
+; CHECK-NEXT: lbu t2, 712(a5)
+; CHECK-NEXT: lui t3, 1
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: sb t1, 983(t3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: sb t2, 990(t1)
+; CHECK-NEXT: lbu t1, 966(a5)
+; CHECK-NEXT: lbu t2, 711(a5)
+; CHECK-NEXT: lui t3, 1
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: sb t1, 975(t3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: sb t2, 982(t1)
+; CHECK-NEXT: lbu t1, 965(a5)
+; CHECK-NEXT: lbu t2, 710(a5)
+; CHECK-NEXT: lui t3, 1
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: sb t1, 967(t3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: sb t2, 974(t1)
+; CHECK-NEXT: lbu t1, 964(a5)
+; CHECK-NEXT: lbu t2, 709(a5)
+; CHECK-NEXT: lbu t3, 708(a5)
+; CHECK-NEXT: lui t4, 1
+; CHECK-NEXT: add t4, sp, t4
+; CHECK-NEXT: sb t1, 959(t4)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: sb t2, 966(t1)
+; CHECK-NEXT: lbu t1, 972(a5)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sb t3, 958(t2)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sb t1, 1023(t2)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1864(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -921(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1896(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -920(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1856(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -913(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1888(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -912(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1816(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -937(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1880(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -936(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1808(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -929(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1872(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -928(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1848(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -953(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1800(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -952(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1840(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -945(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1792(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -944(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1752(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -969(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1704(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -968(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1744(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -961(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1696(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -960(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1832(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -857(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1784(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -856(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1824(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -849(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1768(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -848(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1736(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -873(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1680(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -872(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1728(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -865(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1656(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -864(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1776(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -889(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1720(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -888(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1760(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -881(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1712(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -880(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1664(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -905(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1600(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -904(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1640(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -897(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1576(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -896(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1688(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -793(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1624(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -792(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1672(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -785(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1608(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -784(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1560(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -809(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1512(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -808(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1552(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -801(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1488(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -800(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1616(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -825(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1544(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -824(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1584(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -817(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1536(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -816(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1528(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -841(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1464(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -840(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1496(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -833(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1432(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -832(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1520(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -729(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1472(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -728(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1504(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -721(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1440(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -720(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1416(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -745(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1352(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -744(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1400(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -737(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1344(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -736(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1448(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -761(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1384(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -760(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1424(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -753(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1376(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -752(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1368(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -777(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1328(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -776(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1360(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -769(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1312(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -768(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1648(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -649(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1592(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -648(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1632(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -641(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1568(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -640(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1336(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -665(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1288(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -664(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1320(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -657(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1264(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -656(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1240(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -681(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1176(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -680(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1232(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -673(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1168(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -672(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1272(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -697(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1224(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -696(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1248(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -689(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1216(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -688(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1208(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -713(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1152(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -712(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1192(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -705(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1136(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -704(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1480(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -585(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1408(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -584(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1456(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -577(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1392(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -576(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1160(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -601(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1128(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -600(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1144(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -593(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1112(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -592(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1096(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -617(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1040(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -616(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1088(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -609(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1024(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -608(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1120(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -633(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1072(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -632(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1104(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -625(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1056(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -624(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1280(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -521(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1304(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -520(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1256(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -513(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1296(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -512(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1048(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -537(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -992(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -536(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1032(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -529(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -976(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -528(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -968(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -553(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -912(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -552(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -952(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -545(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -896(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -544(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1000(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -569(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -960(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -568(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -984(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -561(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -936(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -560(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1080(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -457(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1200(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -456(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1064(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -449(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1184(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -448(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -920(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -473(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -864(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -472(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -904(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -465(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -848(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -464(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -816(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -489(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -752(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -488(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -800(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -481(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -736(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -480(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -840(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -505(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -872(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -504(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -824(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -497(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -856(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -496(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -888(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -377(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1016(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -376(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -880(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -369(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -1008(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -368(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -784(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -393(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -944(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -392(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -768(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -385(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -928(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -384(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -832(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -409(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -760(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -408(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -808(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -401(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -744(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -400(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -696(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -425(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -640(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -424(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -672(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -417(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -624(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -416(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -520(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -441(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -720(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -440(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -488(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -433(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -688(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -432(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -792(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -313(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -728(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -312(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -776(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -305(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -704(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -304(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -664(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -329(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -592(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -328(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -656(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -321(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -568(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -320(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -712(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -345(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -648(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -344(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -680(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -337(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -632(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -336(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -576(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -361(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -528(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -360(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -560(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -353(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -496(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -352(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -600(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -249(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -552(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -248(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -584(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -241(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -536(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -240(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -472(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -265(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -424(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -264(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -464(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -257(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -400(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -256(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -544(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -281(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -456(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -280(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -504(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -273(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -448(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -272(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -440(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -297(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -384(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -296(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -408(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -289(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -360(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -288(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -432(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -185(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -392(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -184(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -416(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -177(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -368(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -176(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -344(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -201(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -296(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -200(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -336(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -193(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -288(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -192(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -376(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -217(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -328(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -216(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -352(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -209(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -320(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -208(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -312(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -233(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -272(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -232(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -304(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -225(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -256(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -224(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -616(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -105(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -512(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -104(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -608(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -97(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -480(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -96(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -280(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -121(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -240(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -120(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -264(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -113(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -216(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -112(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -200(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -137(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -152(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -136(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -192(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -129(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -144(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -128(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -224(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -153(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -184(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -152(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -208(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -145(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -176(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -144(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -168(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -169(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -128(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -168(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -160(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -161(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -112(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -160(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -24(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -41(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -248(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -40(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -16(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -33(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -232(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -32(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -136(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -57(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -88(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -56(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -120(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -49(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -80(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -48(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -72(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -73(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -40(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -72(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -64(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -65(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -32(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -64(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -104(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -89(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -56(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -88(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -96(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -81(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -48(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -80(a3)
+; CHECK-NEXT: lui t1, 1
+; CHECK-NEXT: add t1, sp, t1
+; CHECK-NEXT: ld t1, -8(t1) # 8-byte Folded Reload
+; CHECK-NEXT: sb t1, -25(a3)
+; CHECK-NEXT: sb t0, -24(a3)
+; CHECK-NEXT: sb a4, -17(a3)
+; CHECK-NEXT: sb a7, -16(a3)
+; CHECK-NEXT: sb a1, -9(a3)
+; CHECK-NEXT: sb a6, -8(a3)
+; CHECK-NEXT: sb a2, -1(a3)
+; CHECK-NEXT: lbu a1, 1097(a0)
+; CHECK-NEXT: lbu t3, 980(a5)
+; CHECK-NEXT: sb a1, 48(a3)
+; CHECK-NEXT: lbu a1, 721(a5)
+; CHECK-NEXT: lbu t1, 722(a5)
+; CHECK-NEXT: lbu a7, 723(a5)
+; CHECK-NEXT: lbu t5, 724(a5)
+; CHECK-NEXT: lbu a2, 976(a5)
+; CHECK-NEXT: lbu s2, 977(a5)
+; CHECK-NEXT: lbu t2, 978(a5)
+; CHECK-NEXT: lbu t6, 979(a5)
+; CHECK-NEXT: lbu s4, 717(a5)
+; CHECK-NEXT: lbu a3, 718(a5)
+; CHECK-NEXT: lbu s6, 719(a5)
+; CHECK-NEXT: lbu s9, 720(a5)
+; CHECK-NEXT: lbu s5, 973(a5)
+; CHECK-NEXT: lbu a6, 974(a5)
+; CHECK-NEXT: lbu s7, 975(a5)
+; CHECK-NEXT: lbu t0, 985(a5)
+; CHECK-NEXT: lbu a4, 986(a5)
+; CHECK-NEXT: lbu s3, 987(a5)
+; CHECK-NEXT: lbu t4, 988(a5)
+; CHECK-NEXT: sb a7, 1155(a5)
+; CHECK-NEXT: sb t6, 1156(a5)
+; CHECK-NEXT: lbu t6, 729(a5)
+; CHECK-NEXT: lbu a7, 730(a5)
+; CHECK-NEXT: lbu s10, 731(a5)
+; CHECK-NEXT: lbu s11, 732(a5)
+; CHECK-NEXT: sb t5, 1163(a5)
+; CHECK-NEXT: sb t3, 1164(a5)
+; CHECK-NEXT: sb a1, 1139(a5)
+; CHECK-NEXT: sb s2, 1140(a5)
+; CHECK-NEXT: lbu t5, 981(a5)
+; CHECK-NEXT: lbu a1, 982(a5)
+; CHECK-NEXT: lui t3, 1
+; CHECK-NEXT: add t3, sp, t3
+; CHECK-NEXT: sd a1, -8(t3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s8, 983(a5)
+; CHECK-NEXT: lbu s2, 984(a5)
+; CHECK-NEXT: sb t1, 1147(a5)
+; CHECK-NEXT: sb t2, 1148(a5)
+; CHECK-NEXT: sb s6, 1123(a5)
+; CHECK-NEXT: sb s7, 1124(a5)
+; CHECK-NEXT: lbu s6, 725(a5)
+; CHECK-NEXT: lbu t2, 726(a5)
+; CHECK-NEXT: lbu t1, 727(a5)
+; CHECK-NEXT: lbu a1, 728(a5)
+; CHECK-NEXT: sb s9, 1131(a5)
+; CHECK-NEXT: sb a2, 1132(a5)
+; CHECK-NEXT: sb s4, 1107(a5)
+; CHECK-NEXT: sb s5, 1108(a5)
+; CHECK-NEXT: lbu t3, 993(a5)
+; CHECK-NEXT: lbu a2, 994(a5)
+; CHECK-NEXT: lbu s4, 995(a5)
+; CHECK-NEXT: lbu s9, 996(a5)
+; CHECK-NEXT: sb a3, 1115(a5)
+; CHECK-NEXT: sb a6, 1116(a5)
+; CHECK-NEXT: sb s10, 1219(a5)
+; CHECK-NEXT: sb s3, 1220(a5)
+; CHECK-NEXT: lbu s10, 737(a5)
+; CHECK-NEXT: lbu s5, 738(a5)
+; CHECK-NEXT: lbu s7, 739(a5)
+; CHECK-NEXT: lbu ra, 740(a5)
+; CHECK-NEXT: sb s11, 1227(a5)
+; CHECK-NEXT: sb t4, 1228(a5)
+; CHECK-NEXT: sb t6, 1203(a5)
+; CHECK-NEXT: sb t0, 1204(a5)
+; CHECK-NEXT: lbu a3, 989(a5)
+; CHECK-NEXT: lbu a6, 990(a5)
+; CHECK-NEXT: lbu s11, 991(a5)
+; CHECK-NEXT: lbu t0, 992(a5)
+; CHECK-NEXT: sb a7, 1211(a5)
+; CHECK-NEXT: sb a4, 1212(a5)
+; CHECK-NEXT: sb t1, 1187(a5)
+; CHECK-NEXT: sb s8, 1188(a5)
+; CHECK-NEXT: lbu t1, 733(a5)
+; CHECK-NEXT: lbu a7, 734(a5)
+; CHECK-NEXT: lbu a4, 735(a5)
+; CHECK-NEXT: lbu t4, 736(a5)
+; CHECK-NEXT: sb a1, 1195(a5)
+; CHECK-NEXT: sb s2, 1196(a5)
+; CHECK-NEXT: sb s6, 1171(a5)
+; CHECK-NEXT: sb t5, 1172(a5)
+; CHECK-NEXT: lbu t6, 1001(a5)
+; CHECK-NEXT: lbu t5, 1002(a5)
+; CHECK-NEXT: lbu s6, 1003(a5)
+; CHECK-NEXT: lbu s3, 1004(a5)
+; CHECK-NEXT: sb t2, 1179(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -8(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1180(a5)
+; CHECK-NEXT: sb s7, 1283(a5)
+; CHECK-NEXT: sb s4, 1284(a5)
+; CHECK-NEXT: lbu s4, 745(a5)
+; CHECK-NEXT: lbu s2, 746(a5)
+; CHECK-NEXT: lbu s8, 747(a5)
+; CHECK-NEXT: lbu s7, 748(a5)
+; CHECK-NEXT: sb ra, 1291(a5)
+; CHECK-NEXT: sb s9, 1292(a5)
+; CHECK-NEXT: sb s10, 1267(a5)
+; CHECK-NEXT: sb t3, 1268(a5)
+; CHECK-NEXT: lbu t2, 997(a5)
+; CHECK-NEXT: lbu t3, 998(a5)
+; CHECK-NEXT: lbu s10, 999(a5)
+; CHECK-NEXT: lbu s9, 1000(a5)
+; CHECK-NEXT: sb s5, 1275(a5)
+; CHECK-NEXT: sb a2, 1276(a5)
+; CHECK-NEXT: sb a4, 1251(a5)
+; CHECK-NEXT: sb s11, 1252(a5)
+; CHECK-NEXT: lbu a1, 1005(a5)
+; CHECK-NEXT: lbu a2, 1006(a5)
+; CHECK-NEXT: lui a4, 1
+; CHECK-NEXT: add a4, sp, a4
+; CHECK-NEXT: sd a2, -8(a4) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a4, 1007(a5)
+; CHECK-NEXT: lbu a2, 1008(a5)
+; CHECK-NEXT: sb t4, 1259(a5)
+; CHECK-NEXT: sb t0, 1260(a5)
+; CHECK-NEXT: sb t1, 1235(a5)
+; CHECK-NEXT: sb a3, 1236(a5)
+; CHECK-NEXT: lbu t4, 749(a5)
+; CHECK-NEXT: lbu a3, 750(a5)
+; CHECK-NEXT: lbu t1, 751(a5)
+; CHECK-NEXT: lbu t0, 752(a5)
+; CHECK-NEXT: sb a7, 1243(a5)
+; CHECK-NEXT: sb a6, 1244(a5)
+; CHECK-NEXT: sb t4, 1363(a5)
+; CHECK-NEXT: sb a1, 1364(a5)
+; CHECK-NEXT: lbu ra, 741(a5)
+; CHECK-NEXT: lbu s11, 742(a5)
+; CHECK-NEXT: lbu a6, 743(a5)
+; CHECK-NEXT: lbu a7, 744(a5)
+; CHECK-NEXT: sb s8, 1347(a5)
+; CHECK-NEXT: sb s6, 1348(a5)
+; CHECK-NEXT: sb s7, 1355(a5)
+; CHECK-NEXT: sb s3, 1356(a5)
+; CHECK-NEXT: lbu s3, 1009(a5)
+; CHECK-NEXT: lbu t4, 1010(a5)
+; CHECK-NEXT: lbu s7, 1011(a5)
+; CHECK-NEXT: lbu s5, 1012(a5)
+; CHECK-NEXT: sb s4, 1331(a5)
+; CHECK-NEXT: sb t6, 1332(a5)
+; CHECK-NEXT: sb s2, 1339(a5)
+; CHECK-NEXT: sb t5, 1340(a5)
+; CHECK-NEXT: lbu s6, 753(a5)
+; CHECK-NEXT: lbu t5, 754(a5)
+; CHECK-NEXT: lbu a1, 755(a5)
+; CHECK-NEXT: lbu s2, 756(a5)
+; CHECK-NEXT: sb a6, 1315(a5)
+; CHECK-NEXT: sb s10, 1316(a5)
+; CHECK-NEXT: sb a7, 1323(a5)
+; CHECK-NEXT: sb s9, 1324(a5)
+; CHECK-NEXT: lbu t6, 1013(a5)
+; CHECK-NEXT: lbu s4, 1014(a5)
+; CHECK-NEXT: lbu a7, 1015(a5)
+; CHECK-NEXT: lbu a6, 1016(a5)
+; CHECK-NEXT: sb ra, 1299(a5)
+; CHECK-NEXT: sb t2, 1300(a5)
+; CHECK-NEXT: sb s11, 1307(a5)
+; CHECK-NEXT: sb t3, 1308(a5)
+; CHECK-NEXT: lbu s8, 757(a5)
+; CHECK-NEXT: lbu s9, 758(a5)
+; CHECK-NEXT: lbu t3, 759(a5)
+; CHECK-NEXT: lbu t2, 760(a5)
+; CHECK-NEXT: sb s8, 1427(a5)
+; CHECK-NEXT: sb t6, 1428(a5)
+; CHECK-NEXT: sb s9, 1435(a5)
+; CHECK-NEXT: sb s4, 1436(a5)
+; CHECK-NEXT: lbu s4, 1017(a5)
+; CHECK-NEXT: lbu t6, 1018(a5)
+; CHECK-NEXT: lbu s10, 1019(a5)
+; CHECK-NEXT: lbu s8, 1020(a5)
+; CHECK-NEXT: sb a1, 1411(a5)
+; CHECK-NEXT: sb s7, 1412(a5)
+; CHECK-NEXT: sb s2, 1419(a5)
+; CHECK-NEXT: sb s5, 1420(a5)
+; CHECK-NEXT: lbu s9, 761(a5)
+; CHECK-NEXT: lbu s2, 762(a5)
+; CHECK-NEXT: lbu a1, 763(a5)
+; CHECK-NEXT: lbu ra, 764(a5)
+; CHECK-NEXT: sb s6, 1395(a5)
+; CHECK-NEXT: sb s3, 1396(a5)
+; CHECK-NEXT: sb t5, 1403(a5)
+; CHECK-NEXT: sb t4, 1404(a5)
+; CHECK-NEXT: lbu s3, 1021(a5)
+; CHECK-NEXT: lbu s6, 1022(a5)
+; CHECK-NEXT: lbu t5, 1023(a5)
+; CHECK-NEXT: lbu t4, 1024(a5)
+; CHECK-NEXT: sb t1, 1379(a5)
+; CHECK-NEXT: sb a4, 1380(a5)
+; CHECK-NEXT: sb t0, 1387(a5)
+; CHECK-NEXT: sb a2, 1388(a5)
+; CHECK-NEXT: lbu t0, 765(a5)
+; CHECK-NEXT: lbu s11, 766(a5)
+; CHECK-NEXT: lbu a4, 767(a5)
+; CHECK-NEXT: lbu a2, 768(a5)
+; CHECK-NEXT: sb a3, 1371(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: ld a3, -8(a3) # 8-byte Folded Reload
+; CHECK-NEXT: sb a3, 1372(a5)
+; CHECK-NEXT: sb t0, 1491(a5)
+; CHECK-NEXT: sb s3, 1492(a5)
+; CHECK-NEXT: lbu t1, 1025(a5)
+; CHECK-NEXT: lbu t0, 1026(a5)
+; CHECK-NEXT: lbu s7, 1027(a5)
+; CHECK-NEXT: lbu s5, 1028(a5)
+; CHECK-NEXT: sb s11, 1499(a5)
+; CHECK-NEXT: sb s6, 1500(a5)
+; CHECK-NEXT: sb a1, 1475(a5)
+; CHECK-NEXT: sb s10, 1476(a5)
+; CHECK-NEXT: lbu s6, 769(a5)
+; CHECK-NEXT: lbu s3, 770(a5)
+; CHECK-NEXT: lbu s11, 771(a5)
+; CHECK-NEXT: lbu s10, 772(a5)
+; CHECK-NEXT: sb ra, 1483(a5)
+; CHECK-NEXT: sb s8, 1484(a5)
+; CHECK-NEXT: sb s9, 1459(a5)
+; CHECK-NEXT: sb s4, 1460(a5)
+; CHECK-NEXT: lbu s9, 1029(a5)
+; CHECK-NEXT: lbu s8, 1030(a5)
+; CHECK-NEXT: lbu s4, 1031(a5)
+; CHECK-NEXT: lbu a1, 1032(a5)
+; CHECK-NEXT: sb s2, 1467(a5)
+; CHECK-NEXT: sb t6, 1468(a5)
+; CHECK-NEXT: sb t3, 1443(a5)
+; CHECK-NEXT: sb a7, 1444(a5)
+; CHECK-NEXT: lbu a7, 773(a5)
+; CHECK-NEXT: lbu t3, 774(a5)
+; CHECK-NEXT: lbu t6, 775(a5)
+; CHECK-NEXT: lbu a3, 776(a5)
+; CHECK-NEXT: sb t2, 1451(a5)
+; CHECK-NEXT: sb a6, 1452(a5)
+; CHECK-NEXT: sb t6, 1571(a5)
+; CHECK-NEXT: sb s4, 1572(a5)
+; CHECK-NEXT: lbu s4, 781(a5)
+; CHECK-NEXT: lbu t6, 782(a5)
+; CHECK-NEXT: lbu a6, 783(a5)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sd a6, -16(t2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a6, 784(a5)
+; CHECK-NEXT: lui t2, 1
+; CHECK-NEXT: add t2, sp, t2
+; CHECK-NEXT: sd a6, -8(t2) # 8-byte Folded Spill
+; CHECK-NEXT: sb a7, 1555(a5)
+; CHECK-NEXT: sb s9, 1556(a5)
+; CHECK-NEXT: sb t3, 1563(a5)
+; CHECK-NEXT: sb s8, 1564(a5)
+; CHECK-NEXT: lbu t3, 1033(a5)
+; CHECK-NEXT: lbu t2, 1034(a5)
+; CHECK-NEXT: lbu s9, 1035(a5)
+; CHECK-NEXT: lbu s8, 1036(a5)
+; CHECK-NEXT: sb s11, 1539(a5)
+; CHECK-NEXT: sb s7, 1540(a5)
+; CHECK-NEXT: sb s10, 1547(a5)
+; CHECK-NEXT: sb s5, 1548(a5)
+; CHECK-NEXT: lbu s5, 777(a5)
+; CHECK-NEXT: lbu s2, 778(a5)
+; CHECK-NEXT: lbu s10, 779(a5)
+; CHECK-NEXT: lbu s7, 780(a5)
+; CHECK-NEXT: sb s6, 1523(a5)
+; CHECK-NEXT: sb t1, 1524(a5)
+; CHECK-NEXT: sb s3, 1531(a5)
+; CHECK-NEXT: sb t0, 1532(a5)
+; CHECK-NEXT: lbu a7, 1045(a5)
+; CHECK-NEXT: lbu a6, 1046(a5)
+; CHECK-NEXT: lbu s3, 1047(a5)
+; CHECK-NEXT: lbu t0, 1048(a5)
+; CHECK-NEXT: sb a4, 1507(a5)
+; CHECK-NEXT: sb t5, 1508(a5)
+; CHECK-NEXT: sb a2, 1515(a5)
+; CHECK-NEXT: sb t4, 1516(a5)
+; CHECK-NEXT: lbu a2, 1037(a5)
+; CHECK-NEXT: lbu a4, 1038(a5)
+; CHECK-NEXT: lbu s11, 1039(a5)
+; CHECK-NEXT: lbu t1, 1040(a5)
+; CHECK-NEXT: lui t4, 1
+; CHECK-NEXT: add t4, sp, t4
+; CHECK-NEXT: sd t1, -24(t4) # 8-byte Folded Spill
+; CHECK-NEXT: sb s4, 1619(a5)
+; CHECK-NEXT: sb a2, 1620(a5)
+; CHECK-NEXT: sb t6, 1627(a5)
+; CHECK-NEXT: sb a4, 1628(a5)
+; CHECK-NEXT: lbu t5, 789(a5)
+; CHECK-NEXT: lbu t6, 790(a5)
+; CHECK-NEXT: lbu s4, 791(a5)
+; CHECK-NEXT: lbu s6, 792(a5)
+; CHECK-NEXT: sb s10, 1603(a5)
+; CHECK-NEXT: sb s9, 1604(a5)
+; CHECK-NEXT: sb s7, 1611(a5)
+; CHECK-NEXT: sb s8, 1612(a5)
+; CHECK-NEXT: lbu a4, 1041(a5)
+; CHECK-NEXT: lbu a2, 1042(a5)
+; CHECK-NEXT: lbu s7, 1043(a5)
+; CHECK-NEXT: lbu t4, 1044(a5)
+; CHECK-NEXT: sb s5, 1587(a5)
+; CHECK-NEXT: sb t3, 1588(a5)
+; CHECK-NEXT: sb s2, 1595(a5)
+; CHECK-NEXT: sb t2, 1596(a5)
+; CHECK-NEXT: lbu t2, 785(a5)
+; CHECK-NEXT: lbu t1, 786(a5)
+; CHECK-NEXT: lbu s2, 787(a5)
+; CHECK-NEXT: lbu t3, 788(a5)
+; CHECK-NEXT: sb a3, 1579(a5)
+; CHECK-NEXT: sb a1, 1580(a5)
+; CHECK-NEXT: sb s4, 1699(a5)
+; CHECK-NEXT: sb s3, 1700(a5)
+; CHECK-NEXT: lbu a1, 1053(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -40(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1054(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -32(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1055(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -88(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1056(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -64(a3) # 8-byte Folded Spill
+; CHECK-NEXT: sb s6, 1707(a5)
+; CHECK-NEXT: sb t0, 1708(a5)
+; CHECK-NEXT: sb t5, 1683(a5)
+; CHECK-NEXT: sb a7, 1684(a5)
+; CHECK-NEXT: lbu a1, 797(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -72(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 798(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -48(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 799(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -176(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 800(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -112(a3) # 8-byte Folded Spill
+; CHECK-NEXT: sb t6, 1691(a5)
+; CHECK-NEXT: sb a6, 1692(a5)
+; CHECK-NEXT: sb s2, 1667(a5)
+; CHECK-NEXT: sb s7, 1668(a5)
+; CHECK-NEXT: lbu a1, 1049(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -80(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1050(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -56(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1051(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -192(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1052(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -128(a3) # 8-byte Folded Spill
+; CHECK-NEXT: sb t3, 1675(a5)
+; CHECK-NEXT: sb t4, 1676(a5)
+; CHECK-NEXT: sb t2, 1651(a5)
+; CHECK-NEXT: sb a4, 1652(a5)
+; CHECK-NEXT: lbu a1, 793(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -144(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 794(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -96(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 795(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -336(a3) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 796(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: sd a1, -256(a3) # 8-byte Folded Spill
+; CHECK-NEXT: sb t1, 1659(a5)
+; CHECK-NEXT: sb a2, 1660(a5)
+; CHECK-NEXT: lbu a1, 1061(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -200(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1062(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -136(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1063(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -400(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1064(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -320(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 805(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -264(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 806(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -208(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s3, 807(a5)
+; CHECK-NEXT: lbu s9, 808(a5)
+; CHECK-NEXT: lbu a1, 1057(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -168(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1058(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -104(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1059(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -352(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1060(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -280(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 801(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -232(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 802(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -184(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s5, 803(a5)
+; CHECK-NEXT: lbu a1, 804(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -376(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1069(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -296(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1070(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -240(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu t4, 1071(a5)
+; CHECK-NEXT: lbu s6, 1072(a5)
+; CHECK-NEXT: lbu ra, 813(a5)
+; CHECK-NEXT: lbu a1, 814(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -328(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a6, 815(a5)
+; CHECK-NEXT: lbu t3, 816(a5)
+; CHECK-NEXT: lbu a1, 1065(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -120(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1066(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -216(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s2, 1067(a5)
+; CHECK-NEXT: lbu s10, 1068(a5)
+; CHECK-NEXT: lbu a1, 809(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -344(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 810(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -288(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu t1, 811(a5)
+; CHECK-NEXT: lbu t6, 812(a5)
+; CHECK-NEXT: lbu a1, 1081(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -304(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1082(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -272(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1077(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -248(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1078(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -224(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu s4, 1079(a5)
+; CHECK-NEXT: lbu s8, 1080(a5)
+; CHECK-NEXT: lbu a1, 821(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -384(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 822(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -312(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu t0, 823(a5)
+; CHECK-NEXT: lbu t5, 824(a5)
+; CHECK-NEXT: lbu a1, 1073(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -152(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1074(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -160(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1075(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -392(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a1, 1076(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: sd a1, -368(a2) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a3, 825(a5)
+; CHECK-NEXT: lbu a4, 826(a5)
+; CHECK-NEXT: lbu a1, 835(a5)
+; CHECK-NEXT: lbu s7, 817(a5)
+; CHECK-NEXT: lbu a2, 818(a5)
+; CHECK-NEXT: lui a7, 1
+; CHECK-NEXT: add a7, sp, a7
+; CHECK-NEXT: sd a2, -360(a7) # 8-byte Folded Spill
+; CHECK-NEXT: lbu a7, 819(a5)
+; CHECK-NEXT: lbu t2, 820(a5)
+; CHECK-NEXT: sb a1, 0(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -16(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1635(a5)
+; CHECK-NEXT: sb s11, 1636(a5)
+; CHECK-NEXT: lbu a1, 834(a5)
+; CHECK-NEXT: lbu a2, 1090(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -8(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1643(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -24(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1644(a5)
+; CHECK-NEXT: sb a1, -8(a0)
+; CHECK-NEXT: sb a2, -7(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -176(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1763(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -88(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1764(a5)
+; CHECK-NEXT: lbu a1, 833(a5)
+; CHECK-NEXT: lbu a2, 1089(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -112(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1771(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -64(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1772(a5)
+; CHECK-NEXT: sb a1, -16(a0)
+; CHECK-NEXT: sb a2, -15(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -72(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1747(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -40(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1748(a5)
+; CHECK-NEXT: lbu a1, 832(a5)
+; CHECK-NEXT: lbu a2, 1088(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -48(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1755(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -32(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1756(a5)
+; CHECK-NEXT: sb a1, -24(a0)
+; CHECK-NEXT: sb a2, -23(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -336(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1731(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -192(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1732(a5)
+; CHECK-NEXT: lbu a1, 831(a5)
+; CHECK-NEXT: lbu a2, 1087(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -256(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1739(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -128(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1740(a5)
+; CHECK-NEXT: sb a1, -32(a0)
+; CHECK-NEXT: sb a2, -31(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -144(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1715(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -80(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1716(a5)
+; CHECK-NEXT: lbu a1, 830(a5)
+; CHECK-NEXT: lbu a2, 1086(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -96(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1723(a5)
+; CHECK-NEXT: lui s11, 1
+; CHECK-NEXT: add s11, sp, s11
+; CHECK-NEXT: ld s11, -56(s11) # 8-byte Folded Reload
+; CHECK-NEXT: sb s11, 1724(a5)
+; CHECK-NEXT: sb a1, -40(a0)
+; CHECK-NEXT: sb a2, -39(a0)
+; CHECK-NEXT: sb s3, 1827(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -400(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1828(a5)
+; CHECK-NEXT: lbu a1, 829(a5)
+; CHECK-NEXT: lbu a2, 1085(a5)
+; CHECK-NEXT: sb s9, 1835(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -320(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1836(a5)
+; CHECK-NEXT: sb a1, -48(a0)
+; CHECK-NEXT: sb a2, -47(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -264(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1811(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -200(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1812(a5)
+; CHECK-NEXT: lbu a1, 828(a5)
+; CHECK-NEXT: lbu a2, 1084(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -208(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1819(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -136(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1820(a5)
+; CHECK-NEXT: sb a1, -56(a0)
+; CHECK-NEXT: sb a2, -55(a0)
+; CHECK-NEXT: sb s5, 1795(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -352(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1796(a5)
+; CHECK-NEXT: lbu a1, 827(a5)
+; CHECK-NEXT: lbu a2, 1083(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -376(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1803(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -280(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1804(a5)
+; CHECK-NEXT: sb a1, -64(a0)
+; CHECK-NEXT: sb a2, -63(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -232(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1779(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -168(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1780(a5)
+; CHECK-NEXT: lbu a1, 843(a5)
+; CHECK-NEXT: lbu a2, 1099(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -184(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1787(a5)
+; CHECK-NEXT: lui s3, 1
+; CHECK-NEXT: add s3, sp, s3
+; CHECK-NEXT: ld s3, -104(s3) # 8-byte Folded Reload
+; CHECK-NEXT: sb s3, 1788(a5)
+; CHECK-NEXT: sb a1, 64(a0)
+; CHECK-NEXT: sb a2, 65(a0)
+; CHECK-NEXT: sb a6, 1891(a5)
+; CHECK-NEXT: sb t4, 1892(a5)
+; CHECK-NEXT: lbu a1, 842(a5)
+; CHECK-NEXT: lbu a2, 1098(a5)
+; CHECK-NEXT: sb t3, 1899(a5)
+; CHECK-NEXT: sb s6, 1900(a5)
+; CHECK-NEXT: sb a1, 56(a0)
+; CHECK-NEXT: sb a2, 57(a0)
+; CHECK-NEXT: sb ra, 1875(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -296(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1876(a5)
+; CHECK-NEXT: lbu a1, 841(a5)
+; CHECK-NEXT: lbu a2, 1097(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: ld a6, -328(a6) # 8-byte Folded Reload
+; CHECK-NEXT: sb a6, 1883(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: ld a6, -240(a6) # 8-byte Folded Reload
+; CHECK-NEXT: sb a6, 1884(a5)
+; CHECK-NEXT: sb a1, 48(a0)
+; CHECK-NEXT: sb a2, 49(a0)
+; CHECK-NEXT: sb t1, 1859(a5)
+; CHECK-NEXT: sb s2, 1860(a5)
+; CHECK-NEXT: lbu a1, 840(a5)
+; CHECK-NEXT: lbu a2, 1096(a5)
+; CHECK-NEXT: sb t6, 1867(a5)
+; CHECK-NEXT: sb s10, 1868(a5)
+; CHECK-NEXT: sb a1, 40(a0)
+; CHECK-NEXT: sb a2, 41(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -344(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1843(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -120(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1844(a5)
+; CHECK-NEXT: lbu a1, 839(a5)
+; CHECK-NEXT: lbu a2, 1095(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: ld a6, -288(a6) # 8-byte Folded Reload
+; CHECK-NEXT: sb a6, 1851(a5)
+; CHECK-NEXT: lui a6, 1
+; CHECK-NEXT: add a6, sp, a6
+; CHECK-NEXT: ld a6, -216(a6) # 8-byte Folded Reload
+; CHECK-NEXT: sb a6, 1852(a5)
+; CHECK-NEXT: sb a1, 32(a0)
+; CHECK-NEXT: sb a2, 33(a0)
+; CHECK-NEXT: sb a3, 1971(a5)
+; CHECK-NEXT: lbu a1, 838(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: ld a2, -304(a2) # 8-byte Folded Reload
+; CHECK-NEXT: sb a2, 1972(a5)
+; CHECK-NEXT: lbu a2, 1094(a5)
+; CHECK-NEXT: sb a4, 1979(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: ld a3, -272(a3) # 8-byte Folded Reload
+; CHECK-NEXT: sb a3, 1980(a5)
+; CHECK-NEXT: sb a1, 24(a0)
+; CHECK-NEXT: sb a2, 25(a0)
+; CHECK-NEXT: sb t0, 1955(a5)
+; CHECK-NEXT: lbu a1, 837(a5)
+; CHECK-NEXT: sb s4, 1956(a5)
+; CHECK-NEXT: lbu a2, 1093(a5)
+; CHECK-NEXT: sb t5, 1963(a5)
+; CHECK-NEXT: sb s8, 1964(a5)
+; CHECK-NEXT: sb a1, 16(a0)
+; CHECK-NEXT: sb a2, 17(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -384(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1939(a5)
+; CHECK-NEXT: lbu a1, 836(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: ld a2, -248(a2) # 8-byte Folded Reload
+; CHECK-NEXT: sb a2, 1940(a5)
+; CHECK-NEXT: lbu a2, 1092(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: ld a3, -312(a3) # 8-byte Folded Reload
+; CHECK-NEXT: sb a3, 1947(a5)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: ld a3, -224(a3) # 8-byte Folded Reload
+; CHECK-NEXT: sb a3, 1948(a5)
+; CHECK-NEXT: sb a1, 8(a0)
+; CHECK-NEXT: sb a2, 9(a0)
+; CHECK-NEXT: sb a7, 1923(a5)
+; CHECK-NEXT: lbu a1, 1091(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: ld a2, -392(a2) # 8-byte Folded Reload
+; CHECK-NEXT: sb a2, 1924(a5)
+; CHECK-NEXT: sb t2, 1931(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: ld a2, -368(a2) # 8-byte Folded Reload
+; CHECK-NEXT: sb a2, 1932(a5)
+; CHECK-NEXT: sb a1, 1(a0)
+; CHECK-NEXT: sb s7, 1907(a5)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: ld a1, -152(a1) # 8-byte Folded Reload
+; CHECK-NEXT: sb a1, 1908(a5)
+; CHECK-NEXT: lbu a1, 1100(a5)
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: ld a2, -360(a2) # 8-byte Folded Reload
+; CHECK-NEXT: sb a2, 1915(a5)
+; CHECK-NEXT: lui a2, %hi(.LCPI0_0)
+; CHECK-NEXT: ld a2, %lo(.LCPI0_0)(a2)
+; CHECK-NEXT: lui a3, 1
+; CHECK-NEXT: add a3, sp, a3
+; CHECK-NEXT: ld a3, -160(a3) # 8-byte Folded Reload
+; CHECK-NEXT: sb a3, 1916(a5)
+; CHECK-NEXT: sb a1, 73(a0)
+; CHECK-NEXT: lbu a1, 844(a5)
+; CHECK-NEXT: vsetivli zero, 16, e64, m1, ta, ma
+; CHECK-NEXT: vmv.v.x v0, a2
+; CHECK-NEXT: lui a2, 1
+; CHECK-NEXT: add a2, sp, a2
+; CHECK-NEXT: li a3, 1024
+; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, mu
+; CHECK-NEXT: vle8.v v8, (a2), v0.t
+; CHECK-NEXT: sb a1, 72(a0)
+; CHECK-NEXT: li a0, 9
+; CHECK-NEXT: slli a0, a0, 10
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vle8.v v12, (a0)
+; CHECK-NEXT: li a0, 7
+; CHECK-NEXT: slli a0, a0, 10
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: vle8.v v12, (a0), v0.t
+; CHECK-NEXT: vmsne.vi v0, v8, 0
+; CHECK-NEXT: vmsne.vi v8, v12, 0
+; CHECK-NEXT: addi sp, s0, -2032
+; CHECK-NEXT: .cfi_def_cfa sp, 2032
+; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s2, 2008(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s3, 2000(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s4, 1992(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s5, 1984(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s6, 1976(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s7, 1968(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s8, 1960(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s9, 1952(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s10, 1944(sp) # 8-byte Folded Reload
+; CHECK-NEXT: ld s11, 1936(sp) # 8-byte Folded Reload
+; CHECK-NEXT: .cfi_restore ra
+; CHECK-NEXT: .cfi_restore s0
+; CHECK-NEXT: .cfi_restore s2
+; CHECK-NEXT: .cfi_restore s3
+; CHECK-NEXT: .cfi_restore s4
+; CHECK-NEXT: .cfi_restore s5
+; CHECK-NEXT: .cfi_restore s6
+; CHECK-NEXT: .cfi_restore s7
+; CHECK-NEXT: .cfi_restore s8
+; CHECK-NEXT: .cfi_restore s9
+; CHECK-NEXT: .cfi_restore s10
+; CHECK-NEXT: .cfi_restore s11
+; CHECK-NEXT: addi sp, sp, 2032
+; CHECK-NEXT: .cfi_def_cfa_offset 0
+; CHECK-NEXT: ret
+ %a = shufflevector <1024 x i1> %x, <1024 x i1> %y, <2048 x i32> <i32 0, i32 256, i32 512, i32 768, i32 1024, i32 1280, i32 1536, i32 1792, i32 1, i32 257, i32 513, i32 769, i32 1025, i32 1281, i32 1537, i32 1793, i32 2, i32 258, i32 514, i32 770, i32 1026, i32 1282, i32 1538, i32 1794, i32 3, i32 259, i32 515, i32 771, i32 1027, i32 1283, i32 1539, i32 1795, i32 4, i32 260, i32 516, i32 772, i32 1028, i32 1284, i32 1540, i32 1796, i32 5, i32 261, i32 517, i32 773, i32 1029, i32 1285, i32 1541, i32 1797, i32 6, i32 262, i32 518, i32 774, i32 1030, i32 1286, i32 1542, i32 1798, i32 7, i32 263, i32 519, i32 775, i32 1031, i32 1287, i32 1543, i32 1799, i32 8, i32 264, i32 520, i32 776, i32 1032, i32 1288, i32 1544, i32 1800, i32 9, i32 265, i32 521, i32 777, i32 1033, i32 1289, i32 1545, i32 1801, i32 10, i32 266, i32 522, i32 778, i32 1034, i32 1290, i32 1546, i32 1802, i32 11, i32 267, i32 523, i32 779, i32 1035, i32 1291, i32 1547, i32 1803, i32 12, i32 268, i32 524, i32 780, i32 1036, i32 1292, i32 1548, i32 1804, i32 13, i32 269, i32 525, i32 781, i32 1037, i32 1293, i32 1549, i32 1805, i32 14, i32 270, i32 526, i32 782, i32 1038, i32 1294, i32 1550, i32 1806, i32 15, i32 271, i32 527, i32 783, i32 1039, i32 1295, i32 1551, i32 1807, i32 16, i32 272, i32 528, i32 784, i32 1040, i32 1296, i32 1552, i32 1808, i32 17, i32 273, i32 529, i32 785, i32 1041, i32 1297, i32 1553, i32 1809, i32 18, i32 274, i32 530, i32 786, i32 1042, i32 1298, i32 1554, i32 1810, i32 19, i32 275, i32 531, i32 787, i32 1043, i32 1299, i32 1555, i32 1811, i32 20, i32 276, i32 532, i32 788, i32 1044, i32 1300, i32 1556, i32 1812, i32 21, i32 277, i32 533, i32 789, i32 1045, i32 1301, i32 1557, i32 1813, i32 22, i32 278, i32 534, i32 790, i32 1046, i32 1302, i32 1558, i32 1814, i32 23, i32 279, i32 535, i32 791, i32 1047, i32 1303, i32 1559, i32 1815, i32 24, i32 280, i32 536, i32 792, i32 1048, i32 1304, i32 1560, i32 1816, i32 25, i32 281, i32 537, i32 793, i32 1049, i32 1305, i32 1561, i32 1817, i32 26, i32 282, i32 538, i32 794, i32 1050, i32 1306, i32 1562, i32 1818, i32 27, i32 283, i32 539, i32 795, i32 1051, i32 1307, i32 1563, i32 1819, i32 28, i32 284, i32 540, i32 796, i32 1052, i32 1308, i32 1564, i32 1820, i32 29, i32 285, i32 541, i32 797, i32 1053, i32 1309, i32 1565, i32 1821, i32 30, i32 286, i32 542, i32 798, i32 1054, i32 1310, i32 1566, i32 1822, i32 31, i32 287, i32 543, i32 799, i32 1055, i32 1311, i32 1567, i32 1823, i32 32, i32 288, i32 544, i32 800, i32 1056, i32 1312, i32 1568, i32 1824, i32 33, i32 289, i32 545, i32 801, i32 1057, i32 1313, i32 1569, i32 1825, i32 34, i32 290, i32 546, i32 802, i32 1058, i32 1314, i32 1570, i32 1826, i32 35, i32 291, i32 547, i32 803, i32 1059, i32 1315, i32 1571, i32 1827, i32 36, i32 292, i32 548, i32 804, i32 1060, i32 1316, i32 1572, i32 1828, i32 37, i32 293, i32 549, i32 805, i32 1061, i32 1317, i32 1573, i32 1829, i32 38, i32 294, i32 550, i32 806, i32 1062, i32 1318, i32 1574, i32 1830, i32 39, i32 295, i32 551, i32 807, i32 1063, i32 1319, i32 1575, i32 1831, i32 40, i32 296, i32 552, i32 808, i32 1064, i32 1320, i32 1576, i32 1832, i32 41, i32 297, i32 553, i32 809, i32 1065, i32 1321, i32 1577, i32 1833, i32 42, i32 298, i32 554, i32 810, i32 1066, i32 1322, i32 1578, i32 1834, i32 43, i32 299, i32 555, i32 811, i32 1067, i32 1323, i32 1579, i32 1835, i32 44, i32 300, i32 556, i32 812, i32 1068, i32 1324, i32 1580, i32 1836, i32 45, i32 301, i32 557, i32 813, i32 1069, i32 1325, i32 1581, i32 1837, i32 46, i32 302, i32 558, i32 814, i32 1070, i32 1326, i32 1582, i32 1838, i32 47, i32 303, i32 559, i32 815, i32 1071, i32 1327, i32 1583, i32 1839, i32 48, i32 304, i32 560, i32 816, i32 1072, i32 1328, i32 1584, i32 1840, i32 49, i32 305, i32 561, i32 817, i32 1073, i32 1329, i32 1585, i32 1841, i32 50, i32 306, i32 562, i32 818, i32 1074, i32 1330, i32 1586, i32 1842, i32 51, i32 307, i32 563, i32 819, i32 1075, i32 1331, i32 1587, i32 1843, i32 52, i32 308, i32 564, i32 820, i32 1076, i32 1332, i32 1588, i32 1844, i32 53, i32 309, i32 565, i32 821, i32 1077, i32 1333, i32 1589, i32 1845, i32 54, i32 310, i32 566, i32 822, i32 1078, i32 1334, i32 1590, i32 1846, i32 55, i32 311, i32 567, i32 823, i32 1079, i32 1335, i32 1591, i32 1847, i32 56, i32 312, i32 568, i32 824, i32 1080, i32 1336, i32 1592, i32 1848, i32 57, i32 313, i32 569, i32 825, i32 1081, i32 1337, i32 1593, i32 1849, i32 58, i32 314, i32 570, i32 826, i32 1082, i32 1338, i32 1594, i32 1850, i32 59, i32 315, i32 571, i32 827, i32 1083, i32 1339, i32 1595, i32 1851, i32 60, i32 316, i32 572, i32 828, i32 1084, i32 1340, i32 1596, i32 1852, i32 61, i32 317, i32 573, i32 829, i32 1085, i32 1341, i32 1597, i32 1853, i32 62, i32 318, i32 574, i32 830, i32 1086, i32 1342, i32 1598, i32 1854, i32 63, i32 319, i32 575, i32 831, i32 1087, i32 1343, i32 1599, i32 1855, i32 64, i32 320, i32 576, i32 832, i32 1088, i32 1344, i32 1600, i32 1856, i32 65, i32 321, i32 577, i32 833, i32 1089, i32 1345, i32 1601, i32 1857, i32 66, i32 322, i32 578, i32 834, i32 1090, i32 1346, i32 1602, i32 1858, i32 67, i32 323, i32 579, i32 835, i32 1091, i32 1347, i32 1603, i32 1859, i32 68, i32 324, i32 580, i32 836, i32 1092, i32 1348, i32 1604, i32 1860, i32 69, i32 325, i32 581, i32 837, i32 1093, i32 1349, i32 1605, i32 1861, i32 70, i32 326, i32 582, i32 838, i32 1094, i32 1350, i32 1606, i32 1862, i32 71, i32 327, i32 583, i32 839, i32 1095, i32 1351, i32 1607, i32 1863, i32 72, i32 328, i32 584, i32 840, i32 1096, i32 1352, i32 1608, i32 1864, i32 73, i32 329, i32 585, i32 841, i32 1097, i32 1353, i32 1609, i32 1865, i32 74, i32 330, i32 586, i32 842, i32 1098, i32 1354, i32 1610, i32 1866, i32 75, i32 331, i32 587, i32 843, i32 1099, i32 1355, i32 1611, i32 1867, i32 76, i32 332, i32 588, i32 844, i32 1100, i32 1356, i32 1612, i32 1868, i32 77, i32 333, i32 589, i32 845, i32 1101, i32 1357, i32 1613, i32 1869, i32 78, i32 334, i32 590, i32 846, i32 1102, i32 1358, i32 1614, i32 1870, i32 79, i32 335, i32 591, i32 847, i32 1103, i32 1359, i32 1615, i32 1871, i32 80, i32 336, i32 592, i32 848, i32 1104, i32 1360, i32 1616, i32 1872, i32 81, i32 337, i32 593, i32 849, i32 1105, i32 1361, i32 1617, i32 1873, i32 82, i32 338, i32 594, i32 850, i32 1106, i32 1362, i32 1618, i32 1874, i32 83, i32 339, i32 595, i32 851, i32 1107, i32 1363, i32 1619, i32 1875, i32 84, i32 340, i32 596, i32 852, i32 1108, i32 1364, i32 1620, i32 1876, i32 85, i32 341, i32 597, i32 853, i32 1109, i32 1365, i32 1621, i32 1877, i32 86, i32 342, i32 598, i32 854, i32 1110, i32 1366, i32 1622, i32 1878, i32 87, i32 343, i32 599, i32 855, i32 1111, i32 1367, i32 1623, i32 1879, i32 88, i32 344, i32 600, i32 856, i32 1112, i32 1368, i32 1624, i32 1880, i32 89, i32 345, i32 601, i32 857, i32 1113, i32 1369, i32 1625, i32 1881, i32 90, i32 346, i32 602, i32 858, i32 1114, i32 1370, i32 1626, i32 1882, i32 91, i32 347, i32 603, i32 859, i32 1115, i32 1371, i32 1627, i32 1883, i32 92, i32 348, i32 604, i32 860, i32 1116, i32 1372, i32 1628, i32 1884, i32 93, i32 349, i32 605, i32 861, i32 1117, i32 1373, i32 1629, i32 1885, i32 94, i32 350, i32 606, i32 862, i32 1118, i32 1374, i32 1630, i32 1886, i32 95, i32 351, i32 607, i32 863, i32 1119, i32 1375, i32 1631, i32 1887, i32 96, i32 352, i32 608, i32 864, i32 1120, i32 1376, i32 1632, i32 1888, i32 97, i32 353, i32 609, i32 865, i32 1121, i32 1377, i32 1633, i32 1889, i32 98, i32 354, i32 610, i32 866, i32 1122, i32 1378, i32 1634, i32 1890, i32 99, i32 355, i32 611, i32 867, i32 1123, i32 1379, i32 1635, i32 1891, i32 100, i32 356, i32 612, i32 868, i32 1124, i32 1380, i32 1636, i32 1892, i32 101, i32 357, i32 613, i32 869, i32 1125, i32 1381, i32 1637, i32 1893, i32 102, i32 358, i32 614, i32 870, i32 1126, i32 1382, i32 1638, i32 1894, i32 103, i32 359, i32 615, i32 871, i32 1127, i32 1383, i32 1639, i32 1895, i32 104, i32 360, i32 616, i32 872, i32 1128, i32 1384, i32 1640, i32 1896, i32 105, i32 361, i32 617, i32 873, i32 1129, i32 1385, i32 1641, i32 1897, i32 106, i32 362, i32 618, i32 874, i32 1130, i32 1386, i32 1642, i32 1898, i32 107, i32 363, i32 619, i32 875, i32 1131, i32 1387, i32 1643, i32 1899, i32 108, i32 364, i32 620, i32 876, i32 1132, i32 1388, i32 1644, i32 1900, i32 109, i32 365, i32 621, i32 877, i32 1133, i32 1389, i32 1645, i32 1901, i32 110, i32 366, i32 622, i32 878, i32 1134, i32 1390, i32 1646, i32 1902, i32 111, i32 367, i32 623, i32 879, i32 1135, i32 1391, i32 1647, i32 1903, i32 112, i32 368, i32 624, i32 880, i32 1136, i32 1392, i32 1648, i32 1904, i32 113, i32 369, i32 625, i32 881, i32 1137, i32 1393, i32 1649, i32 1905, i32 114, i32 370, i32 626, i32 882, i32 1138, i32 1394, i32 1650, i32 1906, i32 115, i32 371, i32 627, i32 883, i32 1139, i32 1395, i32 1651, i32 1907, i32 116, i32 372, i32 628, i32 884, i32 1140, i32 1396, i32 1652, i32 1908, i32 117, i32 373, i32 629, i32 885, i32 1141, i32 1397, i32 1653, i32 1909, i32 118, i32 374, i32 630, i32 886, i32 1142, i32 1398, i32 1654, i32 1910, i32 119, i32 375, i32 631, i32 887, i32 1143, i32 1399, i32 1655, i32 1911, i32 120, i32 376, i32 632, i32 888, i32 1144, i32 1400, i32 1656, i32 1912, i32 121, i32 377, i32 633, i32 889, i32 1145, i32 1401, i32 1657, i32 1913, i32 122, i32 378, i32 634, i32 890, i32 1146, i32 1402, i32 1658, i32 1914, i32 123, i32 379, i32 635, i32 891, i32 1147, i32 1403, i32 1659, i32 1915, i32 124, i32 380, i32 636, i32 892, i32 1148, i32 1404, i32 1660, i32 1916, i32 125, i32 381, i32 637, i32 893, i32 1149, i32 1405, i32 1661, i32 1917, i32 126, i32 382, i32 638, i32 894, i32 1150, i32 1406, i32 1662, i32 1918, i32 127, i32 383, i32 639, i32 895, i32 1151, i32 1407, i32 1663, i32 1919, i32 128, i32 384, i32 640, i32 896, i32 1152, i32 1408, i32 1664, i32 1920, i32 129, i32 385, i32 641, i32 897, i32 1153, i32 1409, i32 1665, i32 1921, i32 130, i32 386, i32 642, i32 898, i32 1154, i32 1410, i32 1666, i32 1922, i32 131, i32 387, i32 643, i32 899, i32 1155, i32 1411, i32 1667, i32 1923, i32 132, i32 388, i32 644, i32 900, i32 1156, i32 1412, i32 1668, i32 1924, i32 133, i32 389, i32 645, i32 901, i32 1157, i32 1413, i32 1669, i32 1925, i32 134, i32 390, i32 646, i32 902, i32 1158, i32 1414, i32 1670, i32 1926, i32 135, i32 391, i32 647, i32 903, i32 1159, i32 1415, i32 1671, i32 1927, i32 136, i32 392, i32 648, i32 904, i32 1160, i32 1416, i32 1672, i32 1928, i32 137, i32 393, i32 649, i32 905, i32 1161, i32 1417, i32 1673, i32 1929, i32 138, i32 394, i32 650, i32 906, i32 1162, i32 1418, i32 1674, i32 1930, i32 139, i32 395, i32 651, i32 907, i32 1163, i32 1419, i32 1675, i32 1931, i32 140, i32 396, i32 652, i32 908, i32 1164, i32 1420, i32 1676, i32 1932, i32 141, i32 397, i32 653, i32 909, i32 1165, i32 1421, i32 1677, i32 1933, i32 142, i32 398, i32 654, i32 910, i32 1166, i32 1422, i32 1678, i32 1934, i32 143, i32 399, i32 655, i32 911, i32 1167, i32 1423, i32 1679, i32 1935, i32 144, i32 400, i32 656, i32 912, i32 1168, i32 1424, i32 1680, i32 1936, i32 145, i32 401, i32 657, i32 913, i32 1169, i32 1425, i32 1681, i32 1937, i32 146, i32 402, i32 658, i32 914, i32 1170, i32 1426, i32 1682, i32 1938, i32 147, i32 403, i32 659, i32 915, i32 1171, i32 1427, i32 1683, i32 1939, i32 148, i32 404, i32 660, i32 916, i32 1172, i32 1428, i32 1684, i32 1940, i32 149, i32 405, i32 661, i32 917, i32 1173, i32 1429, i32 1685, i32 1941, i32 150, i32 406, i32 662, i32 918, i32 1174, i32 1430, i32 1686, i32 1942, i32 151, i32 407, i32 663, i32 919, i32 1175, i32 1431, i32 1687, i32 1943, i32 152, i32 408, i32 664, i32 920, i32 1176, i32 1432, i32 1688, i32 1944, i32 153, i32 409, i32 665, i32 921, i32 1177, i32 1433, i32 1689, i32 1945, i32 154, i32 410, i32 666, i32 922, i32 1178, i32 1434, i32 1690, i32 1946, i32 155, i32 411, i32 667, i32 923, i32 1179, i32 1435, i32 1691, i32 1947, i32 156, i32 412, i32 668, i32 924, i32 1180, i32 1436, i32 1692, i32 1948, i32 157, i32 413, i32 669, i32 925, i32 1181, i32 1437, i32 1693, i32 1949, i32 158, i32 414, i32 670, i32 926, i32 1182, i32 1438, i32 1694, i32 1950, i32 159, i32 415, i32 671, i32 927, i32 1183, i32 1439, i32 1695, i32 1951, i32 160, i32 416, i32 672, i32 928, i32 1184, i32 1440, i32 1696, i32 1952, i32 161, i32 417, i32 673, i32 929, i32 1185, i32 1441, i32 1697, i32 1953, i32 162, i32 418, i32 674, i32 930, i32 1186, i32 1442, i32 1698, i32 1954, i32 163, i32 419, i32 675, i32 931, i32 1187, i32 1443, i32 1699, i32 1955, i32 164, i32 420, i32 676, i32 932, i32 1188, i32 1444, i32 1700, i32 1956, i32 165, i32 421, i32 677, i32 933, i32 1189, i32 1445, i32 1701, i32 1957, i32 166, i32 422, i32 678, i32 934, i32 1190, i32 1446, i32 1702, i32 1958, i32 167, i32 423, i32 679, i32 935, i32 1191, i32 1447, i32 1703, i32 1959, i32 168, i32 424, i32 680, i32 936, i32 1192, i32 1448, i32 1704, i32 1960, i32 169, i32 425, i32 681, i32 937, i32 1193, i32 1449, i32 1705, i32 1961, i32 170, i32 426, i32 682, i32 938, i32 1194, i32 1450, i32 1706, i32 1962, i32 171, i32 427, i32 683, i32 939, i32 1195, i32 1451, i32 1707, i32 1963, i32 172, i32 428, i32 684, i32 940, i32 1196, i32 1452, i32 1708, i32 1964, i32 173, i32 429, i32 685, i32 941, i32 1197, i32 1453, i32 1709, i32 1965, i32 174, i32 430, i32 686, i32 942, i32 1198, i32 1454, i32 1710, i32 1966, i32 175, i32 431, i32 687, i32 943, i32 1199, i32 1455, i32 1711, i32 1967, i32 176, i32 432, i32 688, i32 944, i32 1200, i32 1456, i32 1712, i32 1968, i32 177, i32 433, i32 689, i32 945, i32 1201, i32 1457, i32 1713, i32 1969, i32 178, i32 434, i32 690, i32 946, i32 1202, i32 1458, i32 1714, i32 1970, i32 179, i32 435, i32 691, i32 947, i32 1203, i32 1459, i32 1715, i32 1971, i32 180, i32 436, i32 692, i32 948, i32 1204, i32 1460, i32 1716, i32 1972, i32 181, i32 437, i32 693, i32 949, i32 1205, i32 1461, i32 1717, i32 1973, i32 182, i32 438, i32 694, i32 950, i32 1206, i32 1462, i32 1718, i32 1974, i32 183, i32 439, i32 695, i32 951, i32 1207, i32 1463, i32 1719, i32 1975, i32 184, i32 440, i32 696, i32 952, i32 1208, i32 1464, i32 1720, i32 1976, i32 185, i32 441, i32 697, i32 953, i32 1209, i32 1465, i32 1721, i32 1977, i32 186, i32 442, i32 698, i32 954, i32 1210, i32 1466, i32 1722, i32 1978, i32 187, i32 443, i32 699, i32 955, i32 1211, i32 1467, i32 1723, i32 1979, i32 188, i32 444, i32 700, i32 956, i32 1212, i32 1468, i32 1724, i32 1980, i32 189, i32 445, i32 701, i32 957, i32 1213, i32 1469, i32 1725, i32 1981, i32 190, i32 446, i32 702, i32 958, i32 1214, i32 1470, i32 1726, i32 1982, i32 191, i32 447, i32 703, i32 959, i32 1215, i32 1471, i32 1727, i32 1983, i32 192, i32 448, i32 704, i32 960, i32 1216, i32 1472, i32 1728, i32 1984, i32 193, i32 449, i32 705, i32 961, i32 1217, i32 1473, i32 1729, i32 1985, i32 194, i32 450, i32 706, i32 962, i32 1218, i32 1474, i32 1730, i32 1986, i32 195, i32 451, i32 707, i32 963, i32 1219, i32 1475, i32 1731, i32 1987, i32 196, i32 452, i32 708, i32 964, i32 1220, i32 1476, i32 1732, i32 1988, i32 197, i32 453, i32 709, i32 965, i32 1221, i32 1477, i32 1733, i32 1989, i32 198, i32 454, i32 710, i32 966, i32 1222, i32 1478, i32 1734, i32 1990, i32 199, i32 455, i32 711, i32 967, i32 1223, i32 1479, i32 1735, i32 1991, i32 200, i32 456, i32 712, i32 968, i32 1224, i32 1480, i32 1736, i32 1992, i32 201, i32 457, i32 713, i32 969, i32 1225, i32 1481, i32 1737, i32 1993, i32 202, i32 458, i32 714, i32 970, i32 1226, i32 1482, i32 1738, i32 1994, i32 203, i32 459, i32 715, i32 971, i32 1227, i32 1483, i32 1739, i32 1995, i32 204, i32 460, i32 716, i32 972, i32 1228, i32 1484, i32 1740, i32 1996, i32 205, i32 461, i32 717, i32 973, i32 1229, i32 1485, i32 1741, i32 1997, i32 206, i32 462, i32 718, i32 974, i32 1230, i32 1486, i32 1742, i32 1998, i32 207, i32 463, i32 719, i32 975, i32 1231, i32 1487, i32 1743, i32 1999, i32 208, i32 464, i32 720, i32 976, i32 1232, i32 1488, i32 1744, i32 2000, i32 209, i32 465, i32 721, i32 977, i32 1233, i32 1489, i32 1745, i32 2001, i32 210, i32 466, i32 722, i32 978, i32 1234, i32 1490, i32 1746, i32 2002, i32 211, i32 467, i32 723, i32 979, i32 1235, i32 1491, i32 1747, i32 2003, i32 212, i32 468, i32 724, i32 980, i32 1236, i32 1492, i32 1748, i32 2004, i32 213, i32 469, i32 725, i32 981, i32 1237, i32 1493, i32 1749, i32 2005, i32 214, i32 470, i32 726, i32 982, i32 1238, i32 1494, i32 1750, i32 2006, i32 215, i32 471, i32 727, i32 983, i32 1239, i32 1495, i32 1751, i32 2007, i32 216, i32 472, i32 728, i32 984, i32 1240, i32 1496, i32 1752, i32 2008, i32 217, i32 473, i32 729, i32 985, i32 1241, i32 1497, i32 1753, i32 2009, i32 218, i32 474, i32 730, i32 986, i32 1242, i32 1498, i32 1754, i32 2010, i32 219, i32 475, i32 731, i32 987, i32 1243, i32 1499, i32 1755, i32 2011, i32 220, i32 476, i32 732, i32 988, i32 1244, i32 1500, i32 1756, i32 2012, i32 221, i32 477, i32 733, i32 989, i32 1245, i32 1501, i32 1757, i32 2013, i32 222, i32 478, i32 734, i32 990, i32 1246, i32 1502, i32 1758, i32 2014, i32 223, i32 479, i32 735, i32 991, i32 1247, i32 1503, i32 1759, i32 2015, i32 224, i32 480, i32 736, i32 992, i32 1248, i32 1504, i32 1760, i32 2016, i32 225, i32 481, i32 737, i32 993, i32 1249, i32 1505, i32 1761, i32 2017, i32 226, i32 482, i32 738, i32 994, i32 1250, i32 1506, i32 1762, i32 2018, i32 227, i32 483, i32 739, i32 995, i32 1251, i32 1507, i32 1763, i32 2019, i32 228, i32 484, i32 740, i32 996, i32 1252, i32 1508, i32 1764, i32 2020, i32 229, i32 485, i32 741, i32 997, i32 1253, i32 1509, i32 1765, i32 2021, i32 230, i32 486, i32 742, i32 998, i32 1254, i32 1510, i32 1766, i32 2022, i32 231, i32 487, i32 743, i32 999, i32 1255, i32 1511, i32 1767, i32 2023, i32 232, i32 488, i32 744, i32 1000, i32 1256, i32 1512, i32 1768, i32 2024, i32 233, i32 489, i32 745, i32 1001, i32 1257, i32 1513, i32 1769, i32 2025, i32 234, i32 490, i32 746, i32 1002, i32 1258, i32 1514, i32 1770, i32 2026, i32 235, i32 491, i32 747, i32 1003, i32 1259, i32 1515, i32 1771, i32 2027, i32 236, i32 492, i32 748, i32 1004, i32 1260, i32 1516, i32 1772, i32 2028, i32 237, i32 493, i32 749, i32 1005, i32 1261, i32 1517, i32 1773, i32 2029, i32 238, i32 494, i32 750, i32 1006, i32 1262, i32 1518, i32 1774, i32 2030, i32 239, i32 495, i32 751, i32 1007, i32 1263, i32 1519, i32 1775, i32 2031, i32 240, i32 496, i32 752, i32 1008, i32 1264, i32 1520, i32 1776, i32 2032, i32 241, i32 497, i32 753, i32 1009, i32 1265, i32 1521, i32 1777, i32 2033, i32 242, i32 498, i32 754, i32 1010, i32 1266, i32 1522, i32 1778, i32 2034, i32 243, i32 499, i32 755, i32 1011, i32 1267, i32 1523, i32 1779, i32 2035, i32 244, i32 500, i32 756, i32 1012, i32 1268, i32 1524, i32 1780, i32 2036, i32 245, i32 501, i32 757, i32 1013, i32 1269, i32 1525, i32 1781, i32 2037, i32 246, i32 502, i32 758, i32 1014, i32 1270, i32 1526, i32 1782, i32 2038, i32 247, i32 503, i32 759, i32 1015, i32 1271, i32 1527, i32 1783, i32 2039, i32 248, i32 504, i32 760, i32 1016, i32 1272, i32 1528, i32 1784, i32 2040, i32 249, i32 505, i32 761, i32 1017, i32 1273, i32 1529, i32 1785, i32 2041, i32 250, i32 506, i32 762, i32 1018, i32 1274, i32 1530, i32 1786, i32 2042, i32 251, i32 507, i32 763, i32 1019, i32 1275, i32 1531, i32 1787, i32 2043, i32 252, i32 508, i32 764, i32 1020, i32 1276, i32 1532, i32 1788, i32 2044, i32 253, i32 509, i32 765, i32 1021, i32 1277, i32 1533, i32 1789, i32 2045, i32 254, i32 510, i32 766, i32 1022, i32 1278, i32 1534, i32 1790, i32 2046, i32 255, i32 511, i32 767, i32 1023, i32 1279, i32 1535, i32 1791, i32 2047>
+ ret <2048 x i1> %a
+}
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