[clang] [llvm] Revert "[MIPS] Define SubTargetFeature for i6500 cpu" (PR #133215)

[Djordje Todorovic via llvm-commits]

https://github.com/djtodoro created https://github.com/llvm/llvm-project/pull/133215

Reverts llvm/llvm-project#132907 due to some test failures.

>From 9c22bc410d3e157686ae5fd76f8c000e65949a9e Mon Sep 17 00:00:00 2001
From: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: Thu, 27 Mar 2025 09:04:45 +0100
Subject: [PATCH] Revert "[MIPS] Define SubTargetFeature for i6500 cpu
 (#132907)"

This reverts commit 6294325a535d8042a667ccfb4400a9f63e1bee63.
---
 clang/test/CodeGen/Mips/subtarget-feature-test.c | 5 -----
 llvm/lib/Target/Mips/Mips.td                     | 8 ++------
 llvm/lib/Target/Mips/MipsSubtarget.h             | 2 +-
 3 files changed, 3 insertions(+), 12 deletions(-)
 delete mode 100644 clang/test/CodeGen/Mips/subtarget-feature-test.c

diff --git a/clang/test/CodeGen/Mips/subtarget-feature-test.c b/clang/test/CodeGen/Mips/subtarget-feature-test.c
deleted file mode 100644
index 7f0b8e7e77135..0000000000000
--- a/clang/test/CodeGen/Mips/subtarget-feature-test.c
+++ /dev/null
@@ -1,5 +0,0 @@
-// RUN: %clang --target=mips64-linux-gnu -mcpu=i6400 -o %t -c %s 2>&1 | FileCheck --allow-empty %s
-// CHECK-NOT: {{.*}} is not a recognized feature for this target
-
-// RUN: %clang --target=mips64-linux-gnu -mcpu=i6500 -o %t -c %s 2>&1 | FileCheck --allow-empty %s
-// CHECK-NOT: {{.*}} is not a recognized feature for this target
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td
index 43a5ae8133d83..9159d11fd486f 100644
--- a/llvm/lib/Target/Mips/Mips.td
+++ b/llvm/lib/Target/Mips/Mips.td
@@ -242,11 +242,7 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl",
 // same CPU architecture.
 def ImplI6400
     : SubtargetFeature<"i6400", "ProcImpl", "MipsSubtarget::CPU::I6400",
-                       "MIPS I6400 Processor", [FeatureMips64r6]>;
-
-def ImplI6500
-    : SubtargetFeature<"i6500", "ProcImpl", "MipsSubtarget::CPU::I6500",
-                       "MIPS I6500 Processor", [FeatureMips64r6]>;
+                       "MIPS I6400/I6500 Processors", [FeatureMips64r6]>;
 
 class Proc<string Name, list<SubtargetFeature> Features>
  : ProcessorModel<Name, MipsGenericModel, Features>;
@@ -272,7 +268,7 @@ def : Proc<"octeon", [FeatureMips64r2, FeatureCnMips]>;
 def : Proc<"octeon+", [FeatureMips64r2, FeatureCnMips, FeatureCnMipsP]>;
 def : ProcessorModel<"p5600", MipsP5600Model, [ImplP5600]>;
 def : ProcessorModel<"i6400", NoSchedModel, [ImplI6400]>;
-def : ProcessorModel<"i6500", NoSchedModel, [ImplI6500]>;
+def : ProcessorModel<"i6500", NoSchedModel, [ImplI6400]>;
 
 def MipsAsmParser : AsmParser {
   let ShouldEmitMatchRegisterName = 0;
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h
index 15127b11d5cdd..0c75597d3decf 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.h
+++ b/llvm/lib/Target/Mips/MipsSubtarget.h
@@ -43,7 +43,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
     Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6
   };
 
-  enum class CPU { P5600, I6400, I6500 };
+  enum class CPU { P5600, I6400 };
 
   // Used to avoid printing dsp warnings multiple times.
   static bool DspWarningPrinted;