[llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)

[via llvm-commits]

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@@ -1047,6 +1047,11 @@ void SIFoldOperandsImpl::foldOperand(
     if (MovOp == AMDGPU::COPY)
       return;
 
+    // Check if the destination register of the MOV operation belongs
+    // to a vector superclass. Folding would be illegal.
+    if (TRI->isVectorSuperClass(DestRC))
+      return;
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mssefat wrote:

I have pushed the updated changes. Could you please review?

https://github.com/llvm/llvm-project/pull/131387