[llvm] MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as first (PR #133068)

[YunQiang Su via llvm-commits]

https://github.com/wzssyqa created https://github.com/llvm/llvm-project/pull/133068

So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.

>From 2c3c8e853f05f3e9742d22fcdb0f525d2ac3fe74 Mon Sep 17 00:00:00 2001
From: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: Wed, 26 Mar 2025 19:03:18 +0800
Subject: [PATCH] MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as
 first

So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.
---
 llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp | 13 +++++++++++++
 llvm/lib/Target/Mips/MipsTargetTransformInfo.h   |  3 +++
 2 files changed, 16 insertions(+)

diff --git a/llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp b/llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
index bd88a0af0ecfe..00dee75e70663 100644
--- a/llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetTransformInfo.cpp
@@ -15,3 +15,16 @@ bool MipsTTIImpl::hasDivRemOp(Type *DataType, bool IsSigned) {
   return TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
                                        VT);
 }
+
+bool MipsTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
+                                const TargetTransformInfo::LSRCost &C2) {
+  // MIPS specific here are "instruction number 1st priority".
+  // If we need to emit adds inside the loop to add up base registers, then
+  // we need at least one extra temporary register.
+  unsigned C1NumRegs = C1.NumRegs + (C1.NumBaseAdds != 0);
+  unsigned C2NumRegs = C2.NumRegs + (C2.NumBaseAdds != 0);
+  return std::tie(C1.Insns, C1NumRegs, C1.AddRecCost, C1.NumIVMuls,
+                  C1.NumBaseAdds, C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
+         std::tie(C2.Insns, C2NumRegs, C2.AddRecCost, C2.NumIVMuls,
+                  C2.NumBaseAdds, C2.ScaleCost, C2.ImmCost, C2.SetupCost);
+}
diff --git a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
index 4c6a0cc32686f..f817a386e600e 100644
--- a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
+++ b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
@@ -33,6 +33,9 @@ class MipsTTIImpl : public BasicTTIImplBase<MipsTTIImpl> {
         TLI(ST->getTargetLowering()) {}
 
   bool hasDivRemOp(Type *DataType, bool IsSigned);
+
+  bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
+                     const TargetTransformInfo::LSRCost &C2);
 };
 
 } // end namespace llvm