[llvm] [LoongArch] Pre-commit tests for absolute difference (PR #132898)
Lu Weining via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 26 01:06:46 PDT 2025
================
@@ -125,202 +128,430 @@ define <4 x i64> @xvabsd_du(<4 x i64> %a, <4 x i64> %b) {
%a.zext = zext <4 x i64> %a to <4 x i128>
%b.zext = zext <4 x i64> %b to <4 x i128>
%sub = sub <4 x i128> %a.zext, %b.zext
- %abs = call <4 x i128> @llvm.abs.v4i128(<4 x i128> %sub, i1 true)
+ %abs = call <4 x i128> @llvm.abs.v2i128(<4 x i128> %sub, i1 true)
%trunc = trunc <4 x i128> %abs to <4 x i64>
ret <4 x i64> %trunc
}
-define <32 x i8> @xvabsd_v32i8_nsw(<32 x i8> %a, <32 x i8> %b) {
-; CHECK-LABEL: xvabsd_v32i8_nsw:
+;; abs(sub_nsw(x, y)) -> abds(a,b)
+define <32 x i8> @xvabsd_b_nsw(<32 x i8> %a, <32 x i8> %b) {
+; CHECK-LABEL: xvabsd_b_nsw:
; CHECK: # %bb.0:
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvneg.b $xr1, $xr0
; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
; CHECK-NEXT: ret
%sub = sub nsw <32 x i8> %a, %b
- %abs = call <32 x i8> @llvm.abs.v32i8(<32 x i8> %sub, i1 true)
+ %abs = call <32 x i8> @llvm.abs.v16i8(<32 x i8> %sub, i1 true)
ret <32 x i8> %abs
}
-define <16 x i16> @xvabsd_v16i16_nsw(<16 x i16> %a, <16 x i16> %b) {
-; CHECK-LABEL: xvabsd_v16i16_nsw:
+define <16 x i16> @xvabsd_h_nsw(<16 x i16> %a, <16 x i16> %b) {
+; CHECK-LABEL: xvabsd_h_nsw:
; CHECK: # %bb.0:
; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvneg.h $xr1, $xr0
; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
; CHECK-NEXT: ret
%sub = sub nsw <16 x i16> %a, %b
- %abs = call <16 x i16> @llvm.abs.v16i16(<16 x i16> %sub, i1 true)
+ %abs = call <16 x i16> @llvm.abs.v8i16(<16 x i16> %sub, i1 true)
ret <16 x i16> %abs
}
-define <8 x i32> @xvabsd_v8i32_nsw(<8 x i32> %a, <8 x i32> %b) {
-; CHECK-LABEL: xvabsd_v8i32_nsw:
+define <8 x i32> @xvabsd_w_nsw(<8 x i32> %a, <8 x i32> %b) {
+; CHECK-LABEL: xvabsd_w_nsw:
; CHECK: # %bb.0:
; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvneg.w $xr1, $xr0
; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
; CHECK-NEXT: ret
%sub = sub nsw <8 x i32> %a, %b
- %abs = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %sub, i1 true)
+ %abs = call <8 x i32> @llvm.abs.v4i32(<8 x i32> %sub, i1 true)
ret <8 x i32> %abs
}
-define <4 x i64> @xvabsd_v4i64_nsw(<4 x i64> %a, <4 x i64> %b) {
-; CHECK-LABEL: xvabsd_v4i64_nsw:
+define <4 x i64> @xvabsd_d_nsw(<4 x i64> %a, <4 x i64> %b) {
+; CHECK-LABEL: xvabsd_d_nsw:
; CHECK: # %bb.0:
; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvneg.d $xr1, $xr0
; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
; CHECK-NEXT: ret
%sub = sub nsw <4 x i64> %a, %b
- %abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %sub, i1 true)
+ %abs = call <4 x i64> @llvm.abs.v2i64(<4 x i64> %sub, i1 true)
ret <4 x i64> %abs
}
-define <32 x i8> @smaxmin_v32i8(<32 x i8> %0, <32 x i8> %1) {
-; CHECK-LABEL: smaxmin_v32i8:
+;; sub(smax(a,b),smin(a,b)) -> abds(a,b)
+define <32 x i8> @maxmin_b(<32 x i8> %0, <32 x i8> %1) {
+; CHECK-LABEL: maxmin_b:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.b $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <32 x i8> @llvm.smax.v32i8(<32 x i8> %0, <32 x i8> %1)
- %b = tail call <32 x i8> @llvm.smin.v32i8(<32 x i8> %0, <32 x i8> %1)
+ %a = tail call <32 x i8> @llvm.smax.v16i8(<32 x i8> %0, <32 x i8> %1)
+ %b = tail call <32 x i8> @llvm.smin.v16i8(<32 x i8> %0, <32 x i8> %1)
%sub = sub <32 x i8> %a, %b
ret <32 x i8> %sub
}
-define <16 x i16> @smaxmin_v16i16(<16 x i16> %0, <16 x i16> %1) {
-; CHECK-LABEL: smaxmin_v16i16:
+define <16 x i16> @maxmin_h(<16 x i16> %0, <16 x i16> %1) {
+; CHECK-LABEL: maxmin_h:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.h $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <16 x i16> @llvm.smax.v16i16(<16 x i16> %0, <16 x i16> %1)
- %b = tail call <16 x i16> @llvm.smin.v16i16(<16 x i16> %0, <16 x i16> %1)
+ %a = tail call <16 x i16> @llvm.smax.v8i16(<16 x i16> %0, <16 x i16> %1)
+ %b = tail call <16 x i16> @llvm.smin.v8i16(<16 x i16> %0, <16 x i16> %1)
%sub = sub <16 x i16> %a, %b
ret <16 x i16> %sub
}
-define <8 x i32> @smaxmin_v8i32(<8 x i32> %0, <8 x i32> %1) {
-; CHECK-LABEL: smaxmin_v8i32:
+define <8 x i32> @maxmin_w(<8 x i32> %0, <8 x i32> %1) {
+; CHECK-LABEL: maxmin_w:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.w $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %0, <8 x i32> %1)
- %b = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %0, <8 x i32> %1)
+ %a = tail call <8 x i32> @llvm.smax.v4i32(<8 x i32> %0, <8 x i32> %1)
+ %b = tail call <8 x i32> @llvm.smin.v4i32(<8 x i32> %0, <8 x i32> %1)
%sub = sub <8 x i32> %a, %b
ret <8 x i32> %sub
}
-define <4 x i64> @smaxmin_v4i64(<4 x i64> %0, <4 x i64> %1) {
-; CHECK-LABEL: smaxmin_v4i64:
+define <4 x i64> @maxmin_d(<4 x i64> %0, <4 x i64> %1) {
+; CHECK-LABEL: maxmin_d:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.d $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %0, <4 x i64> %1)
- %b = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %0, <4 x i64> %1)
+ %a = tail call <4 x i64> @llvm.smax.v2i64(<4 x i64> %0, <4 x i64> %1)
+ %b = tail call <4 x i64> @llvm.smin.v2i64(<4 x i64> %0, <4 x i64> %1)
%sub = sub <4 x i64> %a, %b
ret <4 x i64> %sub
}
-define <32 x i8> @umaxmin_v32i8(<32 x i8> %0, <32 x i8> %1) {
-; CHECK-LABEL: umaxmin_v32i8:
+define <32 x i8> @maxmin_bu(<32 x i8> %0, <32 x i8> %1) {
+; CHECK-LABEL: maxmin_bu:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <32 x i8> @llvm.umax.v32i8(<32 x i8> %0, <32 x i8> %1)
- %b = tail call <32 x i8> @llvm.umin.v32i8(<32 x i8> %0, <32 x i8> %1)
+ %a = tail call <32 x i8> @llvm.umax.v16i8(<32 x i8> %0, <32 x i8> %1)
+ %b = tail call <32 x i8> @llvm.umin.v16i8(<32 x i8> %0, <32 x i8> %1)
%sub = sub <32 x i8> %a, %b
ret <32 x i8> %sub
}
-define <16 x i16> @umaxmin_v16i16(<16 x i16> %0, <16 x i16> %1) {
-; CHECK-LABEL: umaxmin_v16i16:
+define <16 x i16> @maxmin_hu(<16 x i16> %0, <16 x i16> %1) {
+; CHECK-LABEL: maxmin_hu:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.hu $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <16 x i16> @llvm.umax.v16i16(<16 x i16> %0, <16 x i16> %1)
- %b = tail call <16 x i16> @llvm.umin.v16i16(<16 x i16> %0, <16 x i16> %1)
+ %a = tail call <16 x i16> @llvm.umax.v8i16(<16 x i16> %0, <16 x i16> %1)
+ %b = tail call <16 x i16> @llvm.umin.v8i16(<16 x i16> %0, <16 x i16> %1)
%sub = sub <16 x i16> %a, %b
ret <16 x i16> %sub
}
-define <8 x i32> @umaxmin_v8i32(<8 x i32> %0, <8 x i32> %1) {
-; CHECK-LABEL: umaxmin_v8i32:
+define <8 x i32> @maxmin_wu(<8 x i32> %0, <8 x i32> %1) {
+; CHECK-LABEL: maxmin_wu:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.wu $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <8 x i32> @llvm.umax.v8i32(<8 x i32> %0, <8 x i32> %1)
- %b = tail call <8 x i32> @llvm.umin.v8i32(<8 x i32> %0, <8 x i32> %1)
+ %a = tail call <8 x i32> @llvm.umax.v4i32(<8 x i32> %0, <8 x i32> %1)
+ %b = tail call <8 x i32> @llvm.umin.v4i32(<8 x i32> %0, <8 x i32> %1)
%sub = sub <8 x i32> %a, %b
ret <8 x i32> %sub
}
-define <4 x i64> @umaxmin_v4i64(<4 x i64> %0, <4 x i64> %1) {
-; CHECK-LABEL: umaxmin_v4i64:
+define <4 x i64> @maxmin_du(<4 x i64> %0, <4 x i64> %1) {
+; CHECK-LABEL: maxmin_du:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.du $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <4 x i64> @llvm.umax.v4i64(<4 x i64> %0, <4 x i64> %1)
- %b = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %0, <4 x i64> %1)
+ %a = tail call <4 x i64> @llvm.umax.v2i64(<4 x i64> %0, <4 x i64> %1)
+ %b = tail call <4 x i64> @llvm.umin.v2i64(<4 x i64> %0, <4 x i64> %1)
%sub = sub <4 x i64> %a, %b
ret <4 x i64> %sub
}
-define <32 x i8> @umaxmin_v32i8_com1(<32 x i8> %0, <32 x i8> %1) {
-; CHECK-LABEL: umaxmin_v32i8_com1:
+define <32 x i8> @maxmin_bu_com1(<32 x i8> %0, <32 x i8> %1) {
+; CHECK-LABEL: maxmin_bu_com1:
; CHECK: # %bb.0:
; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
; CHECK-NEXT: ret
- %a = tail call <32 x i8> @llvm.umax.v32i8(<32 x i8> %0, <32 x i8> %1)
- %b = tail call <32 x i8> @llvm.umin.v32i8(<32 x i8> %1, <32 x i8> %0)
+ %a = tail call <32 x i8> @llvm.umax.v16i8(<32 x i8> %0, <32 x i8> %1)
+ %b = tail call <32 x i8> @llvm.umin.v16i8(<32 x i8> %1, <32 x i8> %0)
%sub = sub <32 x i8> %a, %b
ret <32 x i8> %sub
}
-declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1)
+;; select(icmp(a,b),sub(a,b),sub(b,a)) -> abds(a,b)
+define <32 x i8> @xvabsd_b_cmp(<32 x i8> %a, <32 x i8> %b) nounwind {
+; CHECK-LABEL: xvabsd_b_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.b $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp slt <32 x i8> %a, %b
+ %ab = sub <32 x i8> %a, %b
+ %ba = sub <32 x i8> %b, %a
+ %sel = select <32 x i1> %cmp, <32 x i8> %ba, <32 x i8> %ab
+ ret <32 x i8> %sel
+}
+
+define <16 x i16> @xvabsd_h_cmp(<16 x i16> %a, <16 x i16> %b) nounwind {
+; CHECK-LABEL: xvabsd_h_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.h $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp slt <16 x i16> %a, %b
+ %ab = sub <16 x i16> %a, %b
+ %ba = sub <16 x i16> %b, %a
+ %sel = select <16 x i1> %cmp, <16 x i16> %ba, <16 x i16> %ab
+ ret <16 x i16> %sel
+}
+
+define <8 x i32> @xvabsd_w_cmp(<8 x i32> %a, <8 x i32> %b) nounwind {
+; CHECK-LABEL: xvabsd_w_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.w $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp slt <8 x i32> %a, %b
+ %ab = sub <8 x i32> %a, %b
+ %ba = sub <8 x i32> %b, %a
+ %sel = select <8 x i1> %cmp, <8 x i32> %ba, <8 x i32> %ab
+ ret <8 x i32> %sel
+}
+
+define <4 x i64> @xvabsd_d_cmp(<4 x i64> %a, <4 x i64> %b) nounwind {
+; CHECK-LABEL: xvabsd_d_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.d $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp slt <4 x i64> %a, %b
+ %ab = sub <4 x i64> %a, %b
+ %ba = sub <4 x i64> %b, %a
+ %sel = select <4 x i1> %cmp, <4 x i64> %ba, <4 x i64> %ab
+ ret <4 x i64> %sel
+}
+
+define <32 x i8> @xvabsd_bu_cmp(<32 x i8> %a, <32 x i8> %b) nounwind {
+; CHECK-LABEL: xvabsd_bu_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ult <32 x i8> %a, %b
+ %ab = sub <32 x i8> %a, %b
+ %ba = sub <32 x i8> %b, %a
+ %sel = select <32 x i1> %cmp, <32 x i8> %ba, <32 x i8> %ab
+ ret <32 x i8> %sel
+}
+
+define <16 x i16> @xvabsd_hu_cmp(<16 x i16> %a, <16 x i16> %b) nounwind {
+; CHECK-LABEL: xvabsd_hu_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.hu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ult <16 x i16> %a, %b
+ %ab = sub <16 x i16> %a, %b
+ %ba = sub <16 x i16> %b, %a
+ %sel = select <16 x i1> %cmp, <16 x i16> %ba, <16 x i16> %ab
+ ret <16 x i16> %sel
+}
+
+define <8 x i32> @xvabsd_wu_cmp(<8 x i32> %a, <8 x i32> %b) nounwind {
+; CHECK-LABEL: xvabsd_wu_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.wu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ult <8 x i32> %a, %b
+ %ab = sub <8 x i32> %a, %b
+ %ba = sub <8 x i32> %b, %a
+ %sel = select <8 x i1> %cmp, <8 x i32> %ba, <8 x i32> %ab
+ ret <8 x i32> %sel
+}
+
+define <4 x i64> @xvabsd_du_cmp(<4 x i64> %a, <4 x i64> %b) nounwind {
+; CHECK-LABEL: xvabsd_du_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.du $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ult <4 x i64> %a, %b
+ %ab = sub <4 x i64> %a, %b
+ %ba = sub <4 x i64> %b, %a
+ %sel = select <4 x i1> %cmp, <4 x i64> %ba, <4 x i64> %ab
+ ret <4 x i64> %sel
+}
+
+;; sub(select(icmp(a,b),a,b),select(icmp(a,b),b,a)) -> abds(a,b)
+define <32 x i8> @xvabsd_b_select(<32 x i8> %a, <32 x i8> %b) nounwind {
+; CHECK-LABEL: xvabsd_b_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.b $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp slt <32 x i8> %a, %b
+ %ab = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
+ %ba = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
+ %sub = sub <32 x i8> %ba, %ab
+ ret <32 x i8> %sub
+}
+
+define <16 x i16> @xvabsd_h_select(<16 x i16> %a, <16 x i16> %b) nounwind {
+; CHECK-LABEL: xvabsd_h_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.h $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp sle <16 x i16> %a, %b
+ %ab = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
+ %ba = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
+ %sub = sub <16 x i16> %ba, %ab
+ ret <16 x i16> %sub
+}
+
+define <8 x i32> @xvabsd_w_select(<8 x i32> %a, <8 x i32> %b) nounwind {
+; CHECK-LABEL: xvabsd_w_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.w $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp sgt <8 x i32> %a, %b
+ %ab = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
+ %ba = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
+ %sub = sub <8 x i32> %ab, %ba
+ ret <8 x i32> %sub
+}
+
+define <4 x i64> @xvabsd_d_select(<4 x i64> %a, <4 x i64> %b) nounwind {
+; CHECK-LABEL: xvabsd_d_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.d $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp sge <4 x i64> %a, %b
+ %ab = select <4 x i1> %cmp, <4 x i64> %a, <4 x i64> %b
+ %ba = select <4 x i1> %cmp, <4 x i64> %b, <4 x i64> %a
+ %sub = sub <4 x i64> %ab, %ba
+ ret <4 x i64> %sub
+}
+
+define <32 x i8> @xvabsd_bu_select(<32 x i8> %a, <32 x i8> %b) nounwind {
+; CHECK-LABEL: xvabsd_bu_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ult <32 x i8> %a, %b
+ %ab = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
+ %ba = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
+ %sub = sub <32 x i8> %ba, %ab
+ ret <32 x i8> %sub
+}
+
+define <16 x i16> @xvabsd_hu_select(<16 x i16> %a, <16 x i16> %b) nounwind {
+; CHECK-LABEL: xvabsd_hu_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.hu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ule <16 x i16> %a, %b
+ %ab = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
+ %ba = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
+ %sub = sub <16 x i16> %ba, %ab
+ ret <16 x i16> %sub
+}
+
+define <8 x i32> @xvabsd_wu_select(<8 x i32> %a, <8 x i32> %b) nounwind {
+; CHECK-LABEL: xvabsd_wu_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.wu $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp ugt <8 x i32> %a, %b
+ %ab = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
+ %ba = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
+ %sub = sub <8 x i32> %ab, %ba
+ ret <8 x i32> %sub
+}
+
+define <4 x i64> @xvabsd_du_select(<4 x i64> %a, <4 x i64> %b) nounwind {
+; CHECK-LABEL: xvabsd_du_select:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xvmin.du $xr2, $xr0, $xr1
+; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
+; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
+; CHECK-NEXT: ret
+ %cmp = icmp uge <4 x i64> %a, %b
+ %ab = select <4 x i1> %cmp, <4 x i64> %a, <4 x i64> %b
+ %ba = select <4 x i1> %cmp, <4 x i64> %b, <4 x i64> %a
+ %sub = sub <4 x i64> %ab, %ba
+ ret <4 x i64> %sub
+}
+
+declare <32 x i8> @llvm.abs.v16i8(<32 x i8>, i1)
-declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1)
-declare <32 x i16> @llvm.abs.v32i16(<32 x i16>, i1)
+declare <16 x i16> @llvm.abs.v8i16(<16 x i16>, i1)
----------------
SixWeining wrote:
Why the intrinsic suffix is different from the type of return value and the first argument?
https://github.com/llvm/llvm-project/pull/132898
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