[llvm] Systemz tti inlinecompat (PR #132976)
Andres Chavarria via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 25 12:15:47 PDT 2025
https://github.com/chavandres created https://github.com/llvm/llvm-project/pull/132976
## What?
Implement `areInlineCompatible` for the SystemZ target using FeatureBitset comparison.
## Why?
The default implementation in `TargetTransformInfoImpl.h` makes a string comparison and only inlines when the target-cpu and the target-features for caller and callee are the same. We are missing out on optimizations when the callee has a subset of features of the caller.
## How?
Get the FeatureBitset of the caller and callee and check when callee is a subset or equal to the caller's features. It's a similar implementation to ARM, PowerPC...
## Testing?
Test cases check for when the callee is a subset of the caller, when it's not a subset and when both are equals.
>From 675f42f054b80026e4cec6998cbc453066eb7275 Mon Sep 17 00:00:00 2001
From: Andres Chavarria <adrchb24 at gmail.com>
Date: Tue, 18 Mar 2025 19:52:38 -0600
Subject: [PATCH 1/2] Implement areInlineCompatible for SystemZ
---
.../SystemZ/SystemZTargetTransformInfo.cpp | 13 ++++++++
.../SystemZ/SystemZTargetTransformInfo.h | 4 +++
.../Inline/SystemZ/inline-target-attr.ll | 33 +++++++++++++++++++
.../Transforms/Inline/SystemZ/lit.local.cfg | 2 ++
4 files changed, 52 insertions(+)
create mode 100644 llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
create mode 100644 llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index 06a0a3a631654..8874c3ef8b8d2 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -422,6 +422,19 @@ bool SystemZTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
C2.ScaleCost, C2.SetupCost);
}
+bool SystemZTTIImpl::areInlineCompatible(const Function *Caller,
+ const Function *Callee) const {
+ const TargetMachine &TM = getTLI()->getTargetMachine();
+
+ const FeatureBitset &CallerBits =
+ TM.getSubtargetImpl(*Caller)->getFeatureBits();
+ const FeatureBitset &CalleeBits =
+ TM.getSubtargetImpl(*Callee)->getFeatureBits();
+
+ // Check that targets features from the callee are subset of the caller's.
+ return CalleeBits < CallerBits;
+}
+
unsigned SystemZTTIImpl::getNumberOfRegisters(unsigned ClassID) const {
bool Vector = (ClassID == 1);
if (!Vector)
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
index 512fcc854d532..45de346cf97f7 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
@@ -62,6 +62,10 @@ class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2);
+
+ bool areInlineCompatible(const Function *Caller,
+ const Function *Callee) const;
+
/// @}
/// \name Vector TTI Implementations
diff --git a/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
new file mode 100644
index 0000000000000..7a722bee0c234
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool ../build/bin/opt --version 5
+; RUN: opt < %s -mtriple=s390x-ibm-linux -S -passes=inline | FileCheck %s
+; RUN: opt < %s -mtriple=s390x-ibm-linux -S -passes='cgscc(inline)' | FileCheck %s
+; Check that we only inline when we have compatible target attributes.
+
+define i32 @foo() #0 {
+entry:
+ %call = call i32 (...) @baz()
+ ret i32 %call
+; CHECK-LABEL: foo
+; CHECK: call i32 (...) @baz()
+}
+
+declare i32 @baz(...) #0
+
+define i32 @bar() #1 {
+entry:
+ %call = call i32 @foo()
+ ret i32 %call
+; CHECK-LABEL: bar
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @qux() #0 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: qux
+; CHECK: call i32 @bar()
+}
+
+attributes #0 = { "target-cpu"="z13" }
+attributes #1 = { "target-cpu"="z14" }
diff --git a/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
new file mode 100644
index 0000000000000..f9dd98a21cc3e
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "SystemZ" in config.root.targets:
+ config.unsupported = True
>From f18941cee89a8576c0e3be8564e8ee153d4aa846 Mon Sep 17 00:00:00 2001
From: Andres Chavarria <adrchb24 at gmail.com>
Date: Thu, 20 Mar 2025 22:52:56 -0600
Subject: [PATCH 2/2] also check FeatureBit equality
---
.../SystemZ/SystemZTargetTransformInfo.cpp | 5 ++--
.../Inline/SystemZ/inline-target-attr.ll | 27 +++++++++++++++----
2 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index 8874c3ef8b8d2..bd0fdb414bedf 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -431,8 +431,9 @@ bool SystemZTTIImpl::areInlineCompatible(const Function *Caller,
const FeatureBitset &CalleeBits =
TM.getSubtargetImpl(*Callee)->getFeatureBits();
- // Check that targets features from the callee are subset of the caller's.
- return CalleeBits < CallerBits;
+ // Check that target features from the callee are subset or
+ // equal to the caller's features.
+ return (CalleeBits == CallerBits) || (CalleeBits < CallerBits);
}
unsigned SystemZTTIImpl::getNumberOfRegisters(unsigned ClassID) const {
diff --git a/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
index 7a722bee0c234..1c70962dd18ee 100644
--- a/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
+++ b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
@@ -1,6 +1,5 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool ../build/bin/opt --version 5
-; RUN: opt < %s -mtriple=s390x-ibm-linux -S -passes=inline | FileCheck %s
-; RUN: opt < %s -mtriple=s390x-ibm-linux -S -passes='cgscc(inline)' | FileCheck %s
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes=inline | FileCheck %s
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes='cgscc(inline)' | FileCheck %s
; Check that we only inline when we have compatible target attributes.
define i32 @foo() #0 {
@@ -29,5 +28,23 @@ entry:
; CHECK: call i32 @bar()
}
-attributes #0 = { "target-cpu"="z13" }
-attributes #1 = { "target-cpu"="z14" }
+define i32 @quux() #2 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: quux
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @foobar() #1 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: foobar
+; CHECK: call i32 (...) @baz()
+}
+
+
+attributes #0 = { "target-cpu"="generic" "target-features"="+guarded-storage" }
+attributes #1 = { "target-cpu"="generic" "target-features"="+guarded-storage,+enhanced-sort" }
+attributes #2 = { "target-cpu"="generic" "target-features"="+concurrent-functions" }
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