[llvm] [MCA] Extend -instruction-tables option with verbosity levels (PR #130574)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-rel-x86-64` running on `ml-opt-rel-x86-64-b1` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/185/builds/15586

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/b/ml-opt-rel-x86-64-b1/build/bin/llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables < /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s | /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s -check-prefixes=ALL,ISN # RUN: at line 2
+ /b/ml-opt-rel-x86-64-b1/build/bin/llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables
+ /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s -check-prefixes=ALL,ISN
/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s:186:13: error: ISN-NEXT: expected string not found in input
# ISN-NEXT: 1 4 3.00 * vlm.v v4, (a1)
            ^
<stdin>:12:44: note: scanning from here
 1 3 1.00 U vsetvli a3, a2, e16, m1, tu, mu
                                           ^
<stdin>:13:2: note: possible intended match here
 1 4 2.00 * vlm.v v4, (a1)
 ^

Input file: <stdin>
Check file: /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/tools/llvm-mca/RISCV/SiFive7/instruction-tables-tests.s

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
            7: [4]: MayLoad 
            8: [5]: MayStore 
            9: [6]: HasSideEffects (U) 
           10:  
           11: [1] [2] [3] [4] [5] [6] Instructions: 
           12:  1 3 1.00 U vsetvli a3, a2, e16, m1, tu, mu 
next:186'0                                                X error: no match found
           13:  1 4 2.00 * vlm.v v4, (a1) 
next:186'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:186'1      ?                          possible intended match
           14:  
next:186'0     ~
           15:  
next:186'0     ~
           16: Resources: 
next:186'0     ~~~~~~~~~~~
           17: [0] - SiFive7FDiv 
next:186'0     ~~~~~~~~~~~~~~~~~~
           18: [1] - SiFive7IDiv 
next:186'0     ~~~~~~~~~~~~~~~~~~
            .
            .
...

```

</details>

https://github.com/llvm/llvm-project/pull/130574