[llvm] Update the base and index value for masked gather (PR #130920)

[Rohit Aggarwal via llvm-commits]

rohitaggarwal007 wrote:

> x86 natively supports gather/scatter nodes with scale values of 1/2/4/8 (similar to regular address math). If the index node is ISD::SHL by a constant shift amount, we might be able to transfer some/all of the shift amount into the scale:
> 
> ```
>    //  index = index_src << { 1, 2, 3, 4 } ; min_shift_amount = 1
>    if (numsignbits(index_src) > (1 + min_shift_amount) {
>      newscale = oldscale * (1 << min_shift_amount) ; iff newscale <= 8
>      newindex  = index_src << { 0, 1, 2, 3 } ;
>   }
> ```
> 
> this could then result in newindex being able to be safely truncated to a vXi32 type

Thanks for the reply.

The pattern of index is not always of type ISD::SHL. It could be ISD::ADD also. As we know ptr there is non-uniform as the base value is 0 and index have many pattern as follows.

1. index -> add ( BASE, ISD::SHL) 
     We are reassigning base = BASE and index to ISD::SHL.
     In this pattern, your suggestion could be applied as per my understanding.
2. index -> add (add (BASE, ISD::SHL), Constant)
    We are reassigning base = BASE and index to add(ISD::SHL , Constant).
    in this case, your suggestion for scale does not apply here.
    To make it applicable, I should do some changes as - base = BASE + Constant and index to ISD::SHL.

I will try this and update the patch.

Just one question, on changing the scale in the micro coded instruction, there will be extra multiplication operation to calculate the absolute address. This will cause extra operation, right? Or this will be handled in another pipe while decoding(parallel fashion)?

https://github.com/llvm/llvm-project/pull/130920