[llvm] de60c0e - [MC] .reloc: move FirstLiteralRelocationKind check to evaluateFixup
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 16 22:32:23 PDT 2025
Author: Fangrui Song
Date: 2025-03-16T22:32:18-07:00
New Revision: de60c0e034f90b634235ce01fc19da9afd8b699c
URL: https://github.com/llvm/llvm-project/commit/de60c0e034f90b634235ce01fc19da9afd8b699c
DIFF: https://github.com/llvm/llvm-project/commit/de60c0e034f90b634235ce01fc19da9afd8b699c.diff
LOG: [MC] .reloc: move FirstLiteralRelocationKind check to evaluateFixup
Target shouldForceRelocation checks `FirstLiteralRelocationKind` to
determine whether a relocation is forced due to the .reloc directive. We
should move the code to evaluateFixup so that many targets don't need to
override shouldForceRelocation.
Added:
Modified:
llvm/lib/MC/MCAssembler.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Removed:
################################################################################
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index 70921f9054d74..3cc02985156ce 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -220,9 +220,10 @@ bool MCAssembler::evaluateFixup(const MCFixup &Fixup, const MCFragment *DF,
Value -= Offset;
}
- // Let the backend force a relocation if needed.
+ // .reloc directive and the backend might force the relocation.
if (IsResolved &&
- getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI)) {
+ (Fixup.getKind() >= FirstLiteralRelocationKind ||
+ getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI))) {
IsResolved = false;
WasForced = true;
}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 337b81d68c93a..3361896f0f94a 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -522,10 +522,6 @@ bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCValue &Target,
const uint64_t,
const MCSubtargetInfo *STI) {
- unsigned Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
- return true;
-
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
// ~0xfff. This means that the required offset to reach a symbol can vary by
// up to one step depending on where the ADRP is in memory. For example:
@@ -538,10 +534,7 @@ bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
// same page as the ADRP and the instruction should encode 0x0. Assuming the
// section isn't 0x1000-aligned, we therefore need to delegate this decision
// to the linker -- a relocation!
- if (Kind == AArch64::fixup_aarch64_pcrel_adrp_imm21)
- return true;
-
- return false;
+ return Fixup.getTargetKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21;
}
namespace {
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index 9fc6685d39f6d..a78a3c3f2d13b 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -52,9 +52,6 @@ class AMDGPUAsmBackend : public MCAsmBackend {
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
- bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target, uint64_t Value,
- const MCSubtargetInfo *STI) override;
};
} //End anonymous namespace
@@ -194,13 +191,6 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
return Infos[Kind - FirstTargetFixupKind];
}
-bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,
- const MCFixup &Fixup,
- const MCValue &, const uint64_t,
- const MCSubtargetInfo *STI) {
- return Fixup.getKind() >= FirstLiteralRelocationKind;
-}
-
unsigned AMDGPUAsmBackend::getMinimumNopSize() const {
return 4;
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index dfaad24e1b877..e125170fb152f 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -960,8 +960,6 @@ bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCSymbolRefExpr *A = Target.getSymA();
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
const unsigned FixupKind = Fixup.getKind();
- if (FixupKind >= FirstLiteralRelocationKind)
- return true;
if (FixupKind == ARM::fixup_arm_thumb_bl) {
assert(Sym && "How did we resolve this?");
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index eb4f6edc117a4..ab769ffd186ec 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -253,8 +253,6 @@ bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCValue &Target,
const uint64_t,
const MCSubtargetInfo *STI) {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
- return true;
switch (Fixup.getTargetKind()) {
default:
return STI->hasFeature(LoongArch::FeatureRelax);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 0ea7f4194b8c4..6e2ff2654854b 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -563,8 +563,6 @@ bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCValue &Target,
const uint64_t,
const MCSubtargetInfo *STI) {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
- return true;
const unsigned FixupKind = Fixup.getKind();
switch (FixupKind) {
default:
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index 9077aa7de5a37..a4f84aec8e368 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -166,7 +166,7 @@ class PPCAsmBackend : public MCAsmBackend {
MCFixupKind Kind = Fixup.getKind();
switch ((unsigned)Kind) {
default:
- return Kind >= FirstLiteralRelocationKind;
+ return false;
case PPC::fixup_ppc_br24:
case PPC::fixup_ppc_br24abs:
case PPC::fixup_ppc_br24_notoc:
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 47ad191ff46ce..fb9422b9937c3 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -117,8 +117,6 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCValue &Target,
const uint64_t,
const MCSubtargetInfo *STI) {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
- return true;
switch (Fixup.getTargetKind()) {
default:
break;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
index 597b9a779e843..fa0ac39434239 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -275,8 +275,6 @@ namespace {
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, const uint64_t,
const MCSubtargetInfo *STI) override {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
- return true;
switch ((Sparc::Fixups)Fixup.getKind()) {
default:
return false;
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
index cbf322a94704b..45459b207026f 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -115,9 +115,6 @@ class SystemZMCAsmBackend : public MCAsmBackend {
}
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
- bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target, const uint64_t Value,
- const MCSubtargetInfo *STI) override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
@@ -159,13 +156,6 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return SystemZ::MCFixupKindInfos[Kind - FirstTargetFixupKind];
}
-bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
- const MCFixup &Fixup,
- const MCValue &, const uint64_t,
- const MCSubtargetInfo *STI) {
- return Fixup.getKind() >= FirstLiteralRelocationKind;
-}
-
void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target,
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 1985973c9f5f5..88cd07e5fb266 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -171,10 +171,6 @@ class X86AsmBackend : public MCAsmBackend {
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
- bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target, const uint64_t Value,
- const MCSubtargetInfo *STI) override;
-
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
@@ -656,13 +652,6 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return Infos[Kind - FirstTargetFixupKind];
}
-bool X86AsmBackend::shouldForceRelocation(const MCAssembler &,
- const MCFixup &Fixup, const MCValue &,
- const uint64_t,
- const MCSubtargetInfo *STI) {
- return Fixup.getKind() >= FirstLiteralRelocationKind;
-}
-
static unsigned getFixupKindSize(unsigned Kind) {
switch (Kind) {
default:
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