[llvm] [AMDGPU][CodeGen] Using MBB's liveIn check in tandem with MCRegAliasIterator in SILowerSGPRSpills (PR #129848)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 16 22:28:55 PDT 2025
================
@@ -128,7 +126,13 @@ static void insertCSRSaves(MachineBasicBlock &SaveBlock,
// incoming register value, so don't kill at the spill point. This happens
// since we pass some special inputs (workgroup IDs) in the callee saved
// range.
- const bool IsLiveIn = MRI.isLiveIn(Reg);
+ bool IsLiveIn = false;
+ for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) {
+ if (SaveBlock.isLiveIn(*R)) {
+ IsLiveIn = true;
+ break;
+ }
+ }
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arsenm wrote:
Should move this to a utility function instead of handling it inline
https://github.com/llvm/llvm-project/pull/129848
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