[llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)

[Matt Arsenault via llvm-commits]

arsenm wrote:

The tests for the issue are already in llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir (and you should also mention this fixes issue number in the description) 

https://github.com/llvm/llvm-project/pull/131387