[llvm] AMDGPU] ISel & PEI for whole wave functions (PR #131334)

[Carl Ritson via llvm-commits]

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@@ -1616,6 +1665,18 @@ void SIFrameLowering::determineCalleeSaves(MachineFunction &MF,
   if (MFI->isEntryFunction())
     return;
 
+  if (ST.isWholeWaveFunction()) {
+    // In practice, all the VGPRs are WWM registers, and we will need to save at
+    // least their inactive lanes. Add them to WWMReservedRegs.
+    assert(!NeedExecCopyReservedReg && "Whole wave functions can use the reg mapped for their i1 argument");
+    for (MCRegister Reg : AMDGPU::VGPR_32RegClass)
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perlfu wrote:

This is going to be expensive.
It's probably fine for making this work, but long term I think we'd need to do this differently.

https://github.com/llvm/llvm-project/pull/131334