[llvm] f333841 - [RISCV] Add nf argument to VReg class instead overriding with a let. NFC (#131235)

via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 14 12:55:08 PDT 2025


Author: Craig Topper
Date: 2025-03-14T12:55:05-07:00
New Revision: f333841844623dd49ab308c2303dccfbf15d003c

URL: https://github.com/llvm/llvm-project/commit/f333841844623dd49ab308c2303dccfbf15d003c
DIFF: https://github.com/llvm/llvm-project/commit/f333841844623dd49ab308c2303dccfbf15d003c.diff

LOG: [RISCV] Add nf argument to VReg class instead overriding with a let. NFC (#131235)

This treats nf consistently with LMul.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVRegisterInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
index 2e709ba5a5483..77523647fbbe0 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
@@ -710,12 +710,13 @@ foreach m = [1, 2, 4] in {
   }
 }
 
-class VReg<list<ValueType> regTypes, dag regList, int Vlmul>
+class VReg<list<ValueType> regTypes, dag regList, int Vlmul, int nf = 1>
     : RISCVRegisterClass<regTypes,
                          64, // The maximum supported ELEN is 64.
                          regList> {
   let IsVRegClass = 1;
   let VLMul = Vlmul;
+  let NF = nf;
 
   let Size = !mul(VLMul, NF, 64);
   let CopyCost = !mul(VLMul, NF);
@@ -799,17 +800,15 @@ class VTupRegList<int LMUL, int NF> {
 
 foreach m = LMULList in {
   foreach nf = NFList<m>.L in {
-    let NF = nf in {
-      def "VRN" # nf # "M" # m # "NoV0"
-        : VReg<VTupRegList<m, nf>.L,
-               (add !cast<RegisterTuples>("VN" # nf # "M" # m # "NoV0")),
-               m>;
-      def "VRN" # nf # "M" # m
-        : VReg<VTupRegList<m, nf>.L,
-               (add !cast<RegisterTuples>("VN" # nf # "M" # m # "NoV0"),
-                    !cast<RegisterTuples>("VN" # nf # "M" # m # "V0")),
-               m>;
-    }
+    def "VRN" # nf # "M" # m # "NoV0"
+      : VReg<VTupRegList<m, nf>.L,
+             (add !cast<RegisterTuples>("VN" # nf # "M" # m # "NoV0")),
+             m, nf>;
+    def "VRN" # nf # "M" # m
+      : VReg<VTupRegList<m, nf>.L,
+             (add !cast<RegisterTuples>("VN" # nf # "M" # m # "NoV0"),
+                  !cast<RegisterTuples>("VN" # nf # "M" # m # "V0")),
+             m, nf>;
   }
 }
 


        


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