[llvm] [BOLT] Pass unfiltered relocations to disassembler. NFCI (PR #131202)

[Paschalis Mpeis via llvm-commits]

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@@ -88,6 +79,63 @@ bool AArch64MCSymbolizer::tryAddingSymbolicOperand(
   return true;
 }
 
+std::optional<Relocation>
+AArch64MCSymbolizer::adjustRelocation(const Relocation &Rel,
+                                      const MCInst &Inst) const {
+  BinaryContext &BC = Function.getBinaryContext();
+
+  // The linker can convert ADRP+ADD and ADRP+LDR instruction sequences into
+  // NOP+ADR. After the conversion, the linker might keep the relocations and
+  // if we try to symbolize ADR's operand using outdated relocations, we might
+  // get unexpected results. Hence, we check for the conversion/relaxation, and
+  // ignore the relocation. The symbolization is done based on the PC-relative
+  // value of the operand instead.
+  if (BC.MIB->isADR(Inst) && (Rel.Type == ELF::R_AARCH64_ADD_ABS_LO12_NC ||
+                              Rel.Type == ELF::R_AARCH64_LD64_GOT_LO12_NC))
+    return std::nullopt;
+
+  // The linker might perform TLS relocations relaxations, such as
+  // changed TLS access model (e.g. changed global dynamic model
+  // to initial exec), thus changing the instructions. The static
+  // relocations might be invalid at this point and we might no
+  // need to process these relocations anymore.
+  // More information could be found by searching
+  // elfNN_aarch64_tls_relax in bfd
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paschalis-mpeis wrote:

nit: no format warning here, but could justify this multi-line comment.

https://github.com/llvm/llvm-project/pull/131202