[llvm] 2ee7ba4 - [RISCV] Move Size and CopyCost overrides for vector register to the VReg class. NFC (#131222)

[via llvm-commits]

Author: Craig Topper
Date: 2025-03-14T10:02:22-07:00
New Revision: 2ee7ba47dc97ef377479ab013a2c3d2074a86393

URL: https://github.com/llvm/llvm-project/commit/2ee7ba47dc97ef377479ab013a2c3d2074a86393
DIFF: https://github.com/llvm/llvm-project/commit/2ee7ba47dc97ef377479ab013a2c3d2074a86393.diff

LOG: [RISCV] Move Size and CopyCost overrides for vector register to the VReg class. NFC (#131222)

Instead using the IsVRegClass to calculate in the base class, just
override directly.

This will scale better if we need to do different types of overrides for
other register types in the future.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVRegisterInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
index a974be4860703..2e709ba5a5483 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
@@ -225,9 +225,6 @@ class RISCVRegisterClass<list<ValueType> regTypes, int align, dag regList>
   int VLMul = 1;
   int NF = 1;
 
-  let Size = !if(IsVRegClass, !mul(VLMul, NF, 64), 0);
-  let CopyCost = !if(IsVRegClass, !mul(VLMul, NF), 1);
-
   let TSFlags{0} = IsVRegClass;
   let TSFlags{2-1} = !logtwo(VLMul);
   let TSFlags{5-3} = !sub(NF, 1);
@@ -719,6 +716,9 @@ class VReg<list<ValueType> regTypes, dag regList, int Vlmul>
                          regList> {
   let IsVRegClass = 1;
   let VLMul = Vlmul;
+
+  let Size = !mul(VLMul, NF, 64);
+  let CopyCost = !mul(VLMul, NF);
 }
 
 defvar VMaskVTs = [vbool1_t, vbool2_t, vbool4_t, vbool8_t, vbool16_t,