[clang] [llvm] [RISCV] Add Zilsd and Zclsd Extensions (PR #131094)

[via llvm-commits]

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@@ -0,0 +1,36 @@
+//===-- RISCVInstrInfoZilsd.td -----------------------------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the RISC-V instructions from the standard 'Zilsd',
+// Load/Store pair instructions extension.
+//
+//===----------------------------------------------------------------------===//
+// Instruction Class Templates
+//===----------------------------------------------------------------------===//
+
+let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in
+class ld_r<string opcodestr, DAGOperand RC>
+    : RVInstI<0b011, OPC_LOAD, (outs RC:$rd), 
+            (ins GPRMem:$rs1, simm12:$imm12),
+              opcodestr, "${rd}, ${imm12}(${rs1})">;
+
+let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
+class sd_r<string opcodestr, DAGOperand RC>
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dong-miao wrote:

I don't understand why the naming suffix is' _r 'or' _ri 'or' _rri '. It seems to be related to' ins'. Is my guess correct?

https://github.com/llvm/llvm-project/pull/131094