[llvm] [AMDGPU] Add intrinsics and MIs for ds_bvh_stack_* (PR #130007)

[Jay Foad via llvm-commits]

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@@ -2714,7 +2714,7 @@ def int_amdgcn_ds_sub_gs_reg_rtn :
             [ImmArg<ArgIndex<1>>, IntrHasSideEffects, IntrWillReturn, IntrNoCallback, IntrNoFree],
             "", [SDNPMemOperand]>;
 
-def int_amdgcn_ds_bvh_stack_rtn :
+class IntDSBVHStackRtn :
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jayfoad wrote:

Could make this class parameterized on `vdst_ty` and `data1_ty` so it can be used for all three intrinsics?

https://github.com/llvm/llvm-project/pull/130007