[llvm] 43ab422 - [LoongArch] Pre-commit test for vector trunc (#131082)
via llvm-commits
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Thu Mar 13 00:47:59 PDT 2025
Author: tangaac
Date: 2025-03-13T15:47:55+08:00
New Revision: 43ab4228d00abcb08b5d75d154deeca9c42ca795
URL: https://github.com/llvm/llvm-project/commit/43ab4228d00abcb08b5d75d154deeca9c42ca795
DIFF: https://github.com/llvm/llvm-project/commit/43ab4228d00abcb08b5d75d154deeca9c42ca795.diff
LOG: [LoongArch] Pre-commit test for vector trunc (#131082)
Added:
llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll b/llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
new file mode 100644
index 0000000000000..a42c3002f46d7
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
@@ -0,0 +1,174 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx %s -o - | FileCheck %s
+
+define void @load_trunc_2i64_to_2i32(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i64_to_2i32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 1
+; CHECK-NEXT: st.w $a0, $a1, 4
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 0
+; CHECK-NEXT: st.w $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i64>, ptr %ptr
+ %trunc = trunc <2 x i64> %a to <2 x i32>
+ store <2 x i32> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_2i64_to_2i16(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i64_to_2i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 1
+; CHECK-NEXT: st.h $a0, $a1, 2
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 0
+; CHECK-NEXT: st.h $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i64>, ptr %ptr
+ %trunc = trunc <2 x i64> %a to <2 x i16>
+ store <2 x i16> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_2i64_to_2i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i64_to_2i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 1
+; CHECK-NEXT: st.b $a0, $a1, 1
+; CHECK-NEXT: vpickve2gr.d $a0, $vr0, 0
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i64>, ptr %ptr
+ %trunc = trunc <2 x i64> %a to <2 x i8>
+ store <2 x i8> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_4i32_to_4i16(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_4i32_to_4i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 3
+; CHECK-NEXT: st.h $a0, $a1, 6
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 2
+; CHECK-NEXT: st.h $a0, $a1, 4
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 1
+; CHECK-NEXT: st.h $a0, $a1, 2
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 0
+; CHECK-NEXT: st.h $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <4 x i32>, ptr %ptr
+ %trunc = trunc <4 x i32> %a to <4 x i16>
+ store <4 x i16> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_4i32_to_4i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_4i32_to_4i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 3
+; CHECK-NEXT: st.b $a0, $a1, 3
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 2
+; CHECK-NEXT: st.b $a0, $a1, 2
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 1
+; CHECK-NEXT: st.b $a0, $a1, 1
+; CHECK-NEXT: vpickve2gr.w $a0, $vr0, 0
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <4 x i32>, ptr %ptr
+ %trunc = trunc <4 x i32> %a to <4 x i8>
+ store <4 x i8> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_8i16_to_8i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_8i16_to_8i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 7
+; CHECK-NEXT: st.b $a0, $a1, 7
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 6
+; CHECK-NEXT: st.b $a0, $a1, 6
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 5
+; CHECK-NEXT: st.b $a0, $a1, 5
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 4
+; CHECK-NEXT: st.b $a0, $a1, 4
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 3
+; CHECK-NEXT: st.b $a0, $a1, 3
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 2
+; CHECK-NEXT: st.b $a0, $a1, 2
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 1
+; CHECK-NEXT: st.b $a0, $a1, 1
+; CHECK-NEXT: vpickve2gr.h $a0, $vr0, 0
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <8 x i16>, ptr %ptr
+ %trunc = trunc <8 x i16> %a to <8 x i8>
+ store <8 x i8> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_2i32_to_2i16(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i32_to_2i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld.w $a2, $a0, 4
+; CHECK-NEXT: ld.w $a0, $a0, 0
+; CHECK-NEXT: st.h $a2, $a1, 2
+; CHECK-NEXT: st.h $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i32>, ptr %ptr
+ %trunc = trunc <2 x i32> %a to <2 x i16>
+ store <2 x i16> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_2i32_to_2i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i32_to_2i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld.w $a2, $a0, 4
+; CHECK-NEXT: ld.w $a0, $a0, 0
+; CHECK-NEXT: st.b $a2, $a1, 1
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i32>, ptr %ptr
+ %trunc = trunc <2 x i32> %a to <2 x i8>
+ store <2 x i8> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_4i16_to_4i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_4i16_to_4i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld.h $a2, $a0, 6
+; CHECK-NEXT: ld.h $a3, $a0, 4
+; CHECK-NEXT: ld.h $a4, $a0, 2
+; CHECK-NEXT: ld.h $a0, $a0, 0
+; CHECK-NEXT: st.b $a2, $a1, 3
+; CHECK-NEXT: st.b $a3, $a1, 2
+; CHECK-NEXT: st.b $a4, $a1, 1
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <4 x i16>, ptr %ptr
+ %trunc = trunc <4 x i16> %a to <4 x i8>
+ store <4 x i8> %trunc, ptr %dst
+ ret void
+}
+
+define void @load_trunc_2i16_to_2i8(ptr %ptr, ptr %dst) nounwind {
+; CHECK-LABEL: load_trunc_2i16_to_2i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld.h $a2, $a0, 2
+; CHECK-NEXT: ld.h $a0, $a0, 0
+; CHECK-NEXT: st.b $a2, $a1, 1
+; CHECK-NEXT: st.b $a0, $a1, 0
+; CHECK-NEXT: ret
+ %a = load <2 x i16>, ptr %ptr
+ %trunc = trunc <2 x i16> %a to <2 x i8>
+ store <2 x i8> %trunc, ptr %dst
+ ret void
+}
+
+
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