[llvm] [RegAlloc] Scale the spill weight by target factor (PR #113675)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> I still think we should be making active effort to just make this the default. I believe this is another case where the target hook is just being used to paper over issues in other areas (I'm not objecting to this as an incremental step).
> 

Thanks for your precious reviewing and suggestions! I also believe this should be made default. But I am not an expert on all targets and not aware of every detail in other targets, so I can only say current approach is good for RISC-V.

> In particular in the previous revision of the patch, the AMDGPU behavior showed rematerialize was totally broken. I also think that something is wrong with whatever tablegen is doing to compute the default class weight. We have quite a lot of code scattered in the allocator and tablegen that were never written to account for subregisters. The defaults are wrong for the allocation priorities (which RISCV also does not look like it's trying to set). We also lack a splitting strategy to evict only a subregister when it would help, and spilling induces new liveness to dead lanes.

Yes, I felt there are some problems when dealing with register pressure. I think AMDGPU/X86 can start to enable this as well so that we can have more separate data to support making it default (and of course uncover these issues you have said).

Please feel free to add me to review when every target is going to customize the spill weight.

https://github.com/llvm/llvm-project/pull/113675