[llvm] [RISCV] Use vsetvli instead of vlenb in Prologue/Epilogue (PR #113756)

[Craig Topper via llvm-commits]

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@@ -415,6 +419,39 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
   return true;
 }
 
+bool RISCVExpandPseudo::expandPseudoReadMulVLENB(
+    MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) {
+  DebugLoc DL = MBBI->getDebugLoc();
+  Register Dst = MBBI->getOperand(0).getReg();
+  unsigned Mul = MBBI->getOperand(1).getImm();
+  RISCVVType::VLMUL VLMUL = RISCVVType::VLMUL::LMUL_1;
+  switch (Mul) {
+  case 1:
+    VLMUL = RISCVVType::VLMUL::LMUL_1;
+    break;
+  case 2:
+    VLMUL = RISCVVType::VLMUL::LMUL_2;
+    break;
+  case 4:
+    VLMUL = RISCVVType::VLMUL::LMUL_4;
+    break;
+  case 8:
+    VLMUL = RISCVVType::VLMUL::LMUL_8;
+    break;
+  default:
+    llvm_unreachable("Unexpected VLENB value");
+  }
+  unsigned VTypeImm = RISCVVType::encodeVTYPE(
+      VLMUL, /*SEW*/ 8, /*TailAgnostic*/ true, /*MaskAgnostic*/ true);
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topperc wrote:

`SEW=`, `TailAgnostic=`, `MaskAgnostic=`

https://github.com/llvm/llvm-project/pull/113756