[llvm] [SPIR-V] Add `OpConstantCompositeContinuedINTEL` instruction (PR #129086)

Viktoria Maximova via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 12 08:36:54 PDT 2025


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@@ -2940,24 +2940,30 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
   case Intrinsic::spv_const_composite: {
     // If no values are attached, the composite is null constant.
     bool IsNull = I.getNumExplicitDefs() + 1 == I.getNumExplicitOperands();
-    // Select a proper instruction.
-    unsigned Opcode = SPIRV::OpConstantNull;
     SmallVector<Register> CompositeArgs;
-    if (!IsNull) {
-      Opcode = SPIRV::OpConstantComposite;
-      if (!wrapIntoSpecConstantOp(I, CompositeArgs))
-        return false;
-    }
     MRI->setRegClass(ResVReg, GR.getRegClass(ResType));
-    auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))
-                   .addDef(ResVReg)
-                   .addUse(GR.getSPIRVTypeID(ResType));
+
     // skip type MD node we already used when generated assign.type for this
     if (!IsNull) {
----------------
vmaksimo wrote:

If it's true, we are going to else branch which handles creation of `OpConstantNull` (I believe this behavior has not changed). In both branches there are return statements, so we should not fall through the `case Intrinsic::spv_const_composite`.

Although seems I've mistakenly removed `wrapIntoSpecConstantOp` from this branch, will take a further look and restore if needed.

https://github.com/llvm/llvm-project/pull/129086


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