[llvm] [AMDGPU] Search for literals among explicit operands only (PR #130771)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 11 19:46:57 PDT 2025
================
@@ -0,0 +1,57 @@
+//===- llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp -----===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "AMDGPUTargetMachine.h"
+#include "AMDGPUUnitTests.h"
+#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+TEST(AMDGPU, IsOperandLegal) {
+ auto TM = createAMDGPUTargetMachine("amdgcn-amd-", "gfx1200", "");
+ if (!TM)
+ GTEST_SKIP();
+
+ GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
+ std::string(TM->getTargetFeatureString()), *TM);
+
+ LLVMContext Ctx;
+ Module Mod("Module", Ctx);
+ Mod.setDataLayout(TM->createDataLayout());
+
+ auto *Type = FunctionType::get(Type::getVoidTy(Ctx), false);
+ auto *F = Function::Create(Type, GlobalValue::ExternalLinkage, "Test", &Mod);
+
+ MachineModuleInfo MMI(TM.get());
+ auto MF =
+ std::make_unique<MachineFunction>(*F, *TM, ST, MMI.getContext(), 42);
+ auto *BB = MF->CreateMachineBasicBlock();
+ MF->push_back(BB);
+
+ auto E = BB->end();
+ DebugLoc DL;
+ const auto &TII = *ST.getInstrInfo();
+ const auto &TRI = *ST.getRegisterInfo();
+ auto &MRI = MF->getRegInfo();
+
+ Register VReg = MRI.createVirtualRegister(&AMDGPU::CCR_SGPR_64RegClass);
+ MachineInstr *Callee =
+ BuildMI(*BB, E, DL, TII.get(AMDGPU::S_MOV_B64), VReg).addGlobalAddress(F);
+ MachineInstr *Call =
+ BuildMI(*BB, E, DL, TII.get(AMDGPU::SI_CALL), AMDGPU::SGPR30_SGPR31)
+ .addReg(VReg)
+ .addImm(0)
+ .addRegMask(TRI.getCallPreservedMask(*MF, CallingConv::AMDGPU_Gfx))
+ .addReg(AMDGPU::VGPR0, RegState::Implicit)
+ .addReg(AMDGPU::VGPR1, RegState::Implicit);
----------------
arsenm wrote:
Won't isOperandLegal get called in the verifier? If you take the MIR here, and put it in test/MachineVerifier does it fail?
https://github.com/llvm/llvm-project/pull/130771
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