[llvm] [AMDGPU] (x or y) xor -1 -> x nor y (PR #130264)

[Shilei Tian via llvm-commits]

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@@ -0,0 +1,115 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr="+wavefrontsize32,-wavefrontsize64" -o - < %s | FileCheck -check-prefix=GFX12W32 %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr="+wavefrontsize32,-wavefrontsize64" -o - < %s | FileCheck -check-prefixes=GFX11W32 %s
+
+define amdgpu_ps i32 @test_w32(i32 %x, i32 %y) {
+; GFX12W32-LABEL: test_w32:
+; GFX12W32:       ; %bb.0:
+; GFX12W32-NEXT:    v_readfirstlane_b32 s0, v0
+; GFX12W32-NEXT:    v_readfirstlane_b32 s1, v1
+; GFX12W32-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX12W32-NEXT:    s_nor_b32 s0, s0, s1
+; GFX12W32-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
+; GFX12W32-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX12W32-NEXT:    v_cmp_ne_u32_e64 s0, 0, v0
+; GFX12W32-NEXT:    s_wait_alu 0xf1ff
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shiltian wrote:

Most of the check lines are redundant. Could consider to use `--check-prefixes=CHECK,GFX...` and then hopefully the update script could tell them apart, though most of the time it doesn't work well. Worth a shot.

https://github.com/llvm/llvm-project/pull/130264