[llvm] [AMDGPU] Narrow 64 bit math to 32 bit if profitable (PR #130577)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,113 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -passes=aggressive-instcombine < %s | FileCheck %s
+
+
+define i64 @narrow_add(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @narrow_add(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483647
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[ZEXT0]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[ZEXT1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[TMP4:%.*]] = zext i32 [[TMP3]] to i64
+; CHECK-NEXT:    ret i64 [[TMP4]]
+;
+  %zext0 = and i64 %a, 2147483647
+  %zext1 = and i64 %b, 2147483647
+  %add = add i64 %zext0, %zext1
+  ret i64 %add
+}
+
+define i64 @narrow_add_1(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @narrow_add_1(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483647
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 2147483648
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[ZEXT0]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[ZEXT1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[TMP4:%.*]] = zext i32 [[TMP3]] to i64
+; CHECK-NEXT:    ret i64 [[TMP4]]
+;
+  %zext0 = and i64 %a, 2147483647
+  %zext1 = and i64 %b, 2147483648
+  %add = add i64 %zext0, %zext1
+  ret i64 %add
+}
+
+define i64 @narrow_mul(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @narrow_mul(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483647
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 0
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[ZEXT0]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[ZEXT1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[TMP4:%.*]] = zext i32 [[TMP3]] to i64
+; CHECK-NEXT:    ret i64 [[TMP4]]
+;
+  %zext0 = and i64 %a, 2147483647
+  %zext1 = and i64 %b, 0
+  %mul = mul i64 %zext0, %zext1
+  ret i64 %mul
+}
+
+define i64 @narrow_mul_1(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @narrow_mul_1(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483647
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 2
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[ZEXT0]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[ZEXT1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[TMP4:%.*]] = zext i32 [[TMP3]] to i64
+; CHECK-NEXT:    ret i64 [[TMP4]]
+;
+  %zext0 = and i64 %a, 2147483647
+  %zext1 = and i64 %b, 2
+  %mul = mul i64 %zext0, %zext1
+  ret i64 %mul
+}
+
+define i64 @no_narrow_add(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @no_narrow_add(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483648
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 2147483648
+; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[ZEXT0]], [[ZEXT1]]
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+  %zext0 = and i64 %a, 2147483648
+  %zext1 = and i64 %b, 2147483648
+  %add = add i64 %zext0, %zext1
+  ret i64 %add
+}
+
+define i64 @no_narrow_add_1(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @no_narrow_add_1(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 4294967295
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 1
+; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[ZEXT0]], [[ZEXT1]]
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+  %zext0 = and i64 %a, 4294967295
+  %zext1 = and i64 %b, 1
+  %add = add i64 %zext0, %zext1
+  ret i64 %add
+}
+
+define i64 @no_narrow_mul(i64 noundef %a, i64 noundef %b) {
+; CHECK-LABEL: define i64 @no_narrow_mul(
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ZEXT0:%.*]] = and i64 [[A]], 2147483648
+; CHECK-NEXT:    [[ZEXT1:%.*]] = and i64 [[B]], 2
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[ZEXT0]], [[ZEXT1]]
+; CHECK-NEXT:    ret i64 [[MUL]]
+;
+  %zext0 = and i64 %a, 2147483648
+  %zext1 = and i64 %b, 2
+  %mul = mul i64 %zext0, %zext1
+  ret i64 %mul
+}
----------------
arsenm wrote:

Test vector cases 

https://github.com/llvm/llvm-project/pull/130577