[llvm] [X86] Support peephole optimization with CCMP instruction (PR #129994)

[Phoebe Wang via llvm-commits]

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@@ -4951,6 +4955,20 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
     }
     return false;
   }
+  case X86::CCMP64ri32:
+  case X86::CCMP32ri:
+  case X86::CCMP16ri:
+  case X86::CCMP8ri: {
+    // The CCMP instruction should not be optimized if the scc/dfv in it is not
+    // same as the one in previous CCMP instruction.
+    unsigned Opcode = FlagI.getOpcode();
+    if (Opcode == X86::CCMP64ri32 || Opcode == X86::CCMP32ri ||
+        Opcode == X86::CCMP16ri || Opcode == X86::CCMP8ri)
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phoebewang wrote:

This doesn't prevent  CCMP + CMP, just e.g., CCMP64ri32 + CCMP16ri. I don't know if we have this pattern in real workload.

https://github.com/llvm/llvm-project/pull/129994