[llvm] [LLVM][SVE] Implement isel for bfloat fptoi and itofp operations. (PR #129713)

[Paul Walker via llvm-commits]

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@@ -4733,6 +4753,10 @@ SDValue AArch64TargetLowering::LowerVectorFP_TO_INT(SDValue Op,
       return DAG.getSetCC(DL, VT, Cvt, Zero, ISD::SETNE);
     }
 
+    // Let common code split the operation.
----------------
paulwalker-arm wrote:

Not really.  I only put the bail out code here because it's the next blob of code that definitely doesn't support `MVT::nxv8f32`.  When I move it before the `i1` handling the output changes thusly:
```
 ; CHECK-NEXT:    lsl z0.s, z0.s, #16
 ; CHECK-NEXT:    fcvtzs z1.s, p0/m, z1.s
 ; CHECK-NEXT:    fcvtzs z0.s, p0/m, z0.s
-; CHECK-NEXT:    ptrue p0.h
-; CHECK-NEXT:    uzp1 z0.h, z0.h, z1.h
-; CHECK-NEXT:    cmpne p0.h, p0/z, z0.h, #0
+; CHECK-NEXT:    cmpne p1.s, p0/z, z1.s, #0
+; CHECK-NEXT:    cmpne p0.s, p0/z, z0.s, #0
+; CHECK-NEXT:    uzp1 p0.h, p0.h, p1.h
```
Looking at the Neoverse SWOG the two compares of the new output look like they'll be serialised and so I might have hit the better output by fluke rather than judgement?


https://github.com/llvm/llvm-project/pull/129713