[llvm] a619f31 - [X86] combineConcatVectorOps - add missing VT/Subtarget checks for MOV*DUP concatenation folds.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-03-10T14:18:41Z
New Revision: a619f3111eb4492a8e074cf7a714f66431d643c0

URL: https://github.com/llvm/llvm-project/commit/a619f3111eb4492a8e074cf7a714f66431d643c0
DIFF: https://github.com/llvm/llvm-project/commit/a619f3111eb4492a8e074cf7a714f66431d643c0.diff

LOG: [X86] combineConcatVectorOps - add missing VT/Subtarget checks for MOV*DUP concatenation folds.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 22a8728451d9d..c3fae7d90348c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -58012,7 +58012,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
     case X86ISD::MOVDDUP:
     case X86ISD::MOVSHDUP:
     case X86ISD::MOVSLDUP: {
-      if (!IsSplat)
+      if (!IsSplat && (VT.is256BitVector() ||
+                       (VT.is512BitVector() && Subtarget.useAVX512Regs())))
         return DAG.getNode(Op0.getOpcode(), DL, VT,
                            ConcatSubOperand(VT, Ops, 0));
       break;