[llvm] [SPIR-V] Remove spv_track_constant() internal intrinsics (PR #130605)
Vyacheslav Levytskyy via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 10 06:47:34 PDT 2025
https://github.com/VyacheslavLevytskyy created https://github.com/llvm/llvm-project/pull/130605
None
>From 33221a17e7e0d4a12249a248ccbbff0a7df02ae4 Mon Sep 17 00:00:00 2001
From: "Levytskyy, Vyacheslav" <vyacheslav.levytskyy at intel.com>
Date: Mon, 10 Mar 2025 06:46:43 -0700
Subject: [PATCH] remove spv_track_constant() intrnal intrinsics
---
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 2 +-
llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp | 9 +-
llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 82 ++++++++++---------
llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp | 33 +++-----
llvm/lib/Target/SPIRV/SPIRVUtils.cpp | 19 ++---
5 files changed, 65 insertions(+), 80 deletions(-)
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 7012ef3534c68..89fb92be0e1eb 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -13,7 +13,7 @@
let TargetPrefix = "spv" in {
def int_spv_assign_type : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty]>;
def int_spv_assign_ptr_type : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
- def int_spv_assign_name : Intrinsic<[], [llvm_any_ty, llvm_vararg_ty]>;
+ def int_spv_assign_name : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty]>;
def int_spv_assign_decoration : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty]>;
def int_spv_value_md : Intrinsic<[], [llvm_metadata_ty]>;
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index 579e37f68d5d8..f5c31ea737839 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -391,12 +391,9 @@ static MachineInstr *getBlockStructInstr(Register ParamReg,
// TODO: maybe unify with prelegalizer pass.
static unsigned getConstFromIntrinsic(Register Reg, MachineRegisterInfo *MRI) {
MachineInstr *DefMI = MRI->getUniqueVRegDef(Reg);
- assert(isSpvIntrinsic(*DefMI, Intrinsic::spv_track_constant) &&
- DefMI->getOperand(2).isReg());
- MachineInstr *DefMI2 = MRI->getUniqueVRegDef(DefMI->getOperand(2).getReg());
- assert(DefMI2->getOpcode() == TargetOpcode::G_CONSTANT &&
- DefMI2->getOperand(1).isCImm());
- return DefMI2->getOperand(1).getCImm()->getValue().getZExtValue();
+ assert(DefMI->getOpcode() == TargetOpcode::G_CONSTANT &&
+ DefMI->getOperand(1).isCImm());
+ return DefMI->getOperand(1).getCImm()->getValue().getZExtValue();
}
// Return type of the instruction result from spv_assign_type intrinsic.
diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
index 751ea5ab2dc47..356f4f6dab75c 100644
--- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
@@ -63,7 +63,7 @@ class SPIRVEmitIntrinsics
SPIRVTargetMachine *TM = nullptr;
SPIRVGlobalRegistry *GR = nullptr;
Function *CurrF = nullptr;
- bool TrackConstants = true;
+ bool TrackConstants = false;//true;
bool HaveFunPtrs = false;
DenseMap<Instruction *, Constant *> AggrConsts;
DenseMap<Instruction *, Type *> AggrConstTypes;
@@ -316,8 +316,10 @@ static void emitAssignName(Instruction *I, IRBuilder<> &B) {
return;
reportFatalOnTokenType(I);
setInsertPointAfterDef(B, I);
- std::vector<Value *> Args = {I};
- addStringImm(I->getName(), B, Args);
+ LLVMContext &Ctx = I->getContext();
+ std::vector<Value *> Args = {
+ I, MetadataAsValue::get(
+ Ctx, MDNode::get(Ctx, MDString::get(Ctx, I->getName())))};
B.CreateIntrinsic(Intrinsic::spv_assign_name, {I->getType()}, Args);
}
@@ -2023,7 +2025,7 @@ void SPIRVEmitIntrinsics::processInstrAfterVisit(Instruction *I,
auto *II = dyn_cast<IntrinsicInst>(I);
bool IsConstComposite =
II && II->getIntrinsicID() == Intrinsic::spv_const_composite;
- if (IsConstComposite && TrackConstants) {
+ if (IsConstComposite) {
setInsertPointAfterDef(B, I);
auto t = AggrConsts.find(I);
assert(t != AggrConsts.end());
@@ -2035,41 +2037,43 @@ void SPIRVEmitIntrinsics::processInstrAfterVisit(Instruction *I,
}
bool IsPhi = isa<PHINode>(I), BPrepared = false;
for (const auto &Op : I->operands()) {
- if (isa<PHINode>(I) || isa<SwitchInst>(I))
- TrackConstants = false;
- if ((isa<ConstantData>(Op) || isa<ConstantExpr>(Op)) && TrackConstants) {
- unsigned OpNo = Op.getOperandNo();
- if (II && ((II->getIntrinsicID() == Intrinsic::spv_gep && OpNo == 0) ||
- (II->paramHasAttr(OpNo, Attribute::ImmArg))))
- continue;
- if (!BPrepared) {
- IsPhi ? B.SetInsertPointPastAllocas(I->getParent()->getParent())
- : B.SetInsertPoint(I);
- BPrepared = true;
- }
- Type *OpTy = Op->getType();
- Value *OpTyVal = Op;
- if (OpTy->isTargetExtTy())
- OpTyVal = getNormalizedPoisonValue(OpTy);
- CallInst *NewOp =
- buildIntrWithMD(Intrinsic::spv_track_constant,
- {OpTy, OpTyVal->getType()}, Op, OpTyVal, {}, B);
- Type *OpElemTy = nullptr;
- if (!IsConstComposite && isPointerTy(OpTy) &&
- (OpElemTy = GR->findDeducedElementType(Op)) != nullptr &&
- OpElemTy != IntegerType::getInt8Ty(I->getContext())) {
- GR->buildAssignPtr(B, IntegerType::getInt8Ty(I->getContext()), NewOp);
- SmallVector<Type *, 2> Types = {OpTy, OpTy};
- SmallVector<Value *, 2> Args = {
- NewOp, buildMD(getNormalizedPoisonValue(OpElemTy)),
- B.getInt32(getPointerAddressSpace(OpTy))};
- CallInst *PtrCasted =
- B.CreateIntrinsic(Intrinsic::spv_ptrcast, {Types}, Args);
- GR->buildAssignPtr(B, OpElemTy, PtrCasted);
- NewOp = PtrCasted;
- }
- I->setOperand(OpNo, NewOp);
+ if (isa<PHINode>(I) || isa<SwitchInst>(I) ||
+ !(isa<ConstantData>(Op) || isa<ConstantExpr>(Op)))
+ continue;
+ unsigned OpNo = Op.getOperandNo();
+ if (II && ((II->getIntrinsicID() == Intrinsic::spv_gep && OpNo == 0) ||
+ (II->paramHasAttr(OpNo, Attribute::ImmArg))))
+ continue;
+
+ if (!BPrepared) {
+ IsPhi ? B.SetInsertPointPastAllocas(I->getParent()->getParent())
+ : B.SetInsertPoint(I);
+ BPrepared = true;
}
+ Type *OpTy = Op->getType();
+ Value *OpTyVal = Op;
+ if (OpTy->isTargetExtTy())
+ OpTyVal = getNormalizedPoisonValue(OpTy);
+ Value *NewOp = Op;
+ if (OpTy->isTargetExtTy())
+ NewOp = buildIntrWithMD(Intrinsic::spv_track_constant,
+ {OpTy, OpTyVal->getType()}, Op, OpTyVal, {}, B);
+ Type *OpElemTy = nullptr;
+ if (!IsConstComposite && isPointerTy(OpTy) &&
+ (OpElemTy = GR->findDeducedElementType(Op)) != nullptr &&
+ OpElemTy != IntegerType::getInt8Ty(I->getContext())) {
+ GR->buildAssignPtr(B, IntegerType::getInt8Ty(I->getContext()), NewOp);
+ SmallVector<Type *, 2> Types = {OpTy, OpTy};
+ SmallVector<Value *, 2> Args = {
+ NewOp, buildMD(getNormalizedPoisonValue(OpElemTy)),
+ B.getInt32(getPointerAddressSpace(OpTy))};
+ CallInst *PtrCasted =
+ B.CreateIntrinsic(Intrinsic::spv_ptrcast, {Types}, Args);
+ GR->buildAssignPtr(B, OpElemTy, PtrCasted);
+ NewOp = PtrCasted;
+ }
+ if (NewOp != Op)
+ I->setOperand(OpNo, NewOp);
}
emitAssignName(I, B);
}
@@ -2417,7 +2421,7 @@ bool SPIRVEmitIntrinsics::runOnFunction(Function &Func) {
deduceOperandElementType(&Phi, nullptr);
for (auto *I : Worklist) {
- TrackConstants = true;
+ TrackConstants = false;//true;
if (!I->getType()->isVoidTy() || isa<StoreInst>(I))
setInsertPointAfterDef(B, I);
// Visitors return either the original/newly created instruction for further
diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
index 3779a4b6ccd34..edf215f0ce00f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
@@ -133,32 +133,25 @@ addConstantsToTrack(MachineFunction &MF, SPIRVGlobalRegistry *GR,
MI->eraseFromParent();
}
-static void
-foldConstantsIntoIntrinsics(MachineFunction &MF,
- const SmallSet<Register, 4> &TrackedConstRegs) {
- SmallVector<MachineInstr *, 10> ToErase;
- MachineRegisterInfo &MRI = MF.getRegInfo();
- const unsigned AssignNameOperandShift = 2;
+static void foldConstantsIntoIntrinsics(MachineFunction &MF,
+ MachineIRBuilder MIB) {
+ SmallVector<MachineInstr *, 64> ToErase;
for (MachineBasicBlock &MBB : MF) {
for (MachineInstr &MI : MBB) {
if (!isSpvIntrinsic(MI, Intrinsic::spv_assign_name))
continue;
- unsigned NumOp = MI.getNumExplicitDefs() + AssignNameOperandShift;
- while (MI.getOperand(NumOp).isReg()) {
- MachineOperand &MOp = MI.getOperand(NumOp);
- MachineInstr *ConstMI = MRI.getVRegDef(MOp.getReg());
- assert(ConstMI->getOpcode() == TargetOpcode::G_CONSTANT);
- MI.removeOperand(NumOp);
- MI.addOperand(MachineOperand::CreateImm(
- ConstMI->getOperand(1).getCImm()->getZExtValue()));
- Register DefReg = ConstMI->getOperand(0).getReg();
- if (MRI.use_empty(DefReg) && !TrackedConstRegs.contains(DefReg))
- ToErase.push_back(ConstMI);
+ const MDNode *MD = MI.getOperand(2).getMetadata();
+ StringRef ValueName = cast<MDString>(MD->getOperand(0))->getString();
+ if (ValueName.size() > 0) {
+ MIB.setInsertPt(*MI.getParent(), MI);
+ buildOpName(MI.getOperand(1).getReg(), ValueName, MIB);
}
+ ToErase.push_back(&MI);
}
+ for (MachineInstr *MI : ToErase)
+ MI->eraseFromParent();
+ ToErase.clear();
}
- for (MachineInstr *MI : ToErase)
- MI->eraseFromParent();
}
static MachineInstr *findAssignTypeInstr(Register Reg,
@@ -1043,7 +1036,7 @@ bool SPIRVPreLegalizer::runOnMachineFunction(MachineFunction &MF) {
// to keep record of tracked constants
SmallSet<Register, 4> TrackedConstRegs;
addConstantsToTrack(MF, GR, ST, TargetExtConstTypes, TrackedConstRegs);
- foldConstantsIntoIntrinsics(MF, TrackedConstRegs);
+ foldConstantsIntoIntrinsics(MF, MIB);
insertBitcasts(MF, GR, MIB);
generateAssignInstrs(MF, GR, MIB, TargetExtConstTypes);
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index ce4f6d6c9288f..05bebb5a0e9c1 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -307,20 +307,11 @@ SPIRV::Scope::Scope getMemScope(LLVMContext &Ctx, SyncScope::ID Id) {
MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,
const MachineRegisterInfo *MRI) {
MachineInstr *MI = MRI->getVRegDef(ConstReg);
- MachineInstr *ConstInstr =
- MI->getOpcode() == SPIRV::G_TRUNC || MI->getOpcode() == SPIRV::G_ZEXT
- ? MRI->getVRegDef(MI->getOperand(1).getReg())
- : MI;
- if (auto *GI = dyn_cast<GIntrinsic>(ConstInstr)) {
- if (GI->is(Intrinsic::spv_track_constant)) {
- ConstReg = ConstInstr->getOperand(2).getReg();
- return MRI->getVRegDef(ConstReg);
- }
- } else if (ConstInstr->getOpcode() == SPIRV::ASSIGN_TYPE) {
- ConstReg = ConstInstr->getOperand(1).getReg();
- return MRI->getVRegDef(ConstReg);
- }
- return MRI->getVRegDef(ConstReg);
+ if (MI->getOpcode() == SPIRV::G_TRUNC || MI->getOpcode() == SPIRV::G_ZEXT)
+ return getDefInstrMaybeConstant(ConstReg = MI->getOperand(1).getReg(), MRI);
+ if (MI->getOpcode() == SPIRV::ASSIGN_TYPE)
+ return getDefInstrMaybeConstant(ConstReg = MI->getOperand(1).getReg(), MRI);
+ return MI;
}
uint64_t getIConstVal(Register ConstReg, const MachineRegisterInfo *MRI) {
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