[llvm] 52225d2 - [AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (#123722)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 10 05:06:39 PDT 2025
Author: Akshat Oke
Date: 2025-03-10T17:36:35+05:30
New Revision: 52225d2702592b220f87aa82fb434bf776d4f745
URL: https://github.com/llvm/llvm-project/commit/52225d2702592b220f87aa82fb434bf776d4f745
DIFF: https://github.com/llvm/llvm-project/commit/52225d2702592b220f87aa82fb434bf776d4f745.diff
LOG: [AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (#123722)
Added:
llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
Modified:
llvm/lib/Target/AMDGPU/AMDGPU.h
llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 57297288eecb4..16e1144cf8028 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -156,8 +156,8 @@ struct AMDGPULowerBufferFatPointersPass
const TargetMachine &TM;
};
-void initializeAMDGPUReserveWWMRegsPass(PassRegistry &);
-extern char &AMDGPUReserveWWMRegsID;
+void initializeAMDGPUReserveWWMRegsLegacyPass(PassRegistry &);
+extern char &AMDGPUReserveWWMRegsLegacyID;
void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &);
extern char &AMDGPURewriteOutArgumentsID;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
index 1050855176c04..4099b9ec2cead 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
@@ -99,6 +99,7 @@ FUNCTION_PASS_WITH_PARAMS(
MACHINE_FUNCTION_PASS("amdgpu-insert-delay-alu", AMDGPUInsertDelayAluPass())
MACHINE_FUNCTION_PASS("amdgpu-isel", AMDGPUISelDAGToDAGPass(*this))
MACHINE_FUNCTION_PASS("amdgpu-pre-ra-long-branch-reg", GCNPreRALongBranchRegPass())
+MACHINE_FUNCTION_PASS("amdgpu-reserve-wwm-regs", AMDGPUReserveWWMRegsPass())
MACHINE_FUNCTION_PASS("amdgpu-rewrite-partial-reg-uses", GCNRewritePartialRegUsesPass())
MACHINE_FUNCTION_PASS("amdgpu-pre-ra-optimizations", GCNPreRAOptimizationsPass())
MACHINE_FUNCTION_PASS("amdgpu-nsa-reassign", GCNNSAReassignPass())
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
index e0348e192977b..f255bfc128d6b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
@@ -14,6 +14,7 @@
//
//===----------------------------------------------------------------------===//
+#include "AMDGPUReserveWWMRegs.h"
#include "AMDGPU.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIMachineFunctionInfo.h"
@@ -27,12 +28,12 @@ using namespace llvm;
namespace {
-class AMDGPUReserveWWMRegs : public MachineFunctionPass {
+class AMDGPUReserveWWMRegsLegacy : public MachineFunctionPass {
public:
static char ID;
- AMDGPUReserveWWMRegs() : MachineFunctionPass(ID) {
- initializeAMDGPUReserveWWMRegsPass(*PassRegistry::getPassRegistry());
+ AMDGPUReserveWWMRegsLegacy() : MachineFunctionPass(ID) {
+ initializeAMDGPUReserveWWMRegsLegacyPass(*PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
@@ -47,16 +48,34 @@ class AMDGPUReserveWWMRegs : public MachineFunctionPass {
}
};
+class AMDGPUReserveWWMRegs {
+public:
+ bool run(MachineFunction &MF);
+};
+
} // End anonymous namespace.
-INITIALIZE_PASS(AMDGPUReserveWWMRegs, DEBUG_TYPE,
+INITIALIZE_PASS(AMDGPUReserveWWMRegsLegacy, DEBUG_TYPE,
"AMDGPU Reserve WWM Registers", false, false)
-char AMDGPUReserveWWMRegs::ID = 0;
+char AMDGPUReserveWWMRegsLegacy::ID = 0;
+
+char &llvm::AMDGPUReserveWWMRegsLegacyID = AMDGPUReserveWWMRegsLegacy::ID;
-char &llvm::AMDGPUReserveWWMRegsID = AMDGPUReserveWWMRegs::ID;
+bool AMDGPUReserveWWMRegsLegacy::runOnMachineFunction(MachineFunction &MF) {
+ return AMDGPUReserveWWMRegs().run(MF);
+}
+
+PreservedAnalyses
+AMDGPUReserveWWMRegsPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &) {
+ AMDGPUReserveWWMRegs().run(MF);
+ // TODO: This should abandon RegisterClassInfo once it is turned into an
+ // analysis.
+ return PreservedAnalyses::all();
+}
-bool AMDGPUReserveWWMRegs::runOnMachineFunction(MachineFunction &MF) {
+bool AMDGPUReserveWWMRegs::run(MachineFunction &MF) {
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
bool Changed = false;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
new file mode 100644
index 0000000000000..7c58590347f3e
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
@@ -0,0 +1,24 @@
+//===- AMDGPUReserveWWMRegs.h -----------------------------------*- C++- *-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
+#define LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+class AMDGPUReserveWWMRegsPass
+ : public PassInfoMixin<AMDGPUReserveWWMRegsPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
+};
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index ce3dcd920bce3..3bd9e5eb5e07d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -25,6 +25,7 @@
#include "AMDGPUOpenCLEnqueuedBlockLowering.h"
#include "AMDGPUPerfHintAnalysis.h"
#include "AMDGPURemoveIncompatibleFunctions.h"
+#include "AMDGPUReserveWWMRegs.h"
#include "AMDGPUSplitModule.h"
#include "AMDGPUTargetObjectFile.h"
#include "AMDGPUTargetTransformInfo.h"
@@ -528,7 +529,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeAMDGPURemoveIncompatibleFunctionsLegacyPass(*PR);
initializeAMDGPULowerModuleLDSLegacyPass(*PR);
initializeAMDGPULowerBufferFatPointersPass(*PR);
- initializeAMDGPUReserveWWMRegsPass(*PR);
+ initializeAMDGPUReserveWWMRegsLegacyPass(*PR);
initializeAMDGPURewriteOutArgumentsPass(*PR);
initializeAMDGPURewriteUndefForPHILegacyPass(*PR);
initializeAMDGPUUnifyMetadataPass(*PR);
@@ -1599,7 +1600,7 @@ bool GCNPassConfig::addRegAssignAndRewriteFast() {
addPass(createWWMRegAllocPass(false));
addPass(&SILowerWWMCopiesLegacyID);
- addPass(&AMDGPUReserveWWMRegsID);
+ addPass(&AMDGPUReserveWWMRegsLegacyID);
// For allocating per-thread VGPRs.
addPass(createVGPRAllocPass(false));
@@ -1636,7 +1637,7 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
addPass(createWWMRegAllocPass(true));
addPass(&SILowerWWMCopiesLegacyID);
addPass(createVirtRegRewriter(false));
- addPass(&AMDGPUReserveWWMRegsID);
+ addPass(&AMDGPUReserveWWMRegsLegacyID);
// For allocating per-thread VGPRs.
addPass(createVGPRAllocPass(true));
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