[llvm] [DAG] fold AVGFLOORS to AVGFLOORU for non-negative operand (#84746) (PR #129678)

[via llvm-commits]

https://github.com/sommersun updated https://github.com/llvm/llvm-project/pull/129678

>From 70a1e1453c617b8c20362032fa002801e39136ee Mon Sep 17 00:00:00 2001
From: sxx <948074686 at qq.com>
Date: Tue, 4 Mar 2025 14:19:16 +0800
Subject: [PATCH] fold AVGFLOERS to AVGFLOORU for non-negative operand(#84746)

---
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp        | 6 ++++++
 llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll | 5 ++---
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index f197ae61550a9..798637f0c5a5b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5389,6 +5389,12 @@ SDValue DAGCombiner::visitAVG(SDNode *N) {
     }
   }
 
+  // Fold avgfloors(x,y) -> avgflooru(x,y) if both x and y are non-negative
+  if (Opcode == ISD::AVGFLOORS && hasOperation(ISD::AVGFLOORU, VT)) {
+    if (DAG.SignBitIsZero(N0) && DAG.SignBitIsZero(N1))
+      return DAG.getNode(ISD::AVGFLOORU, DL, VT, N0, N1);
+  }
+
   return SDValue();
 }
 
diff --git a/llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll b/llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
index 0506e1ed9710b..b07ba763d20ec 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
@@ -35,9 +35,8 @@ define <8 x i16> @rhaddu_zext(<8 x i8> %a0, <8 x i8> %a1) {
 define <8 x i16> @hadds_zext(<8 x i8> %a0, <8 x i8> %a1) {
 ; CHECK-LABEL: hadds_zext:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    ushll v0.8h, v0.8b, #0
-; CHECK-NEXT:    ushll v1.8h, v1.8b, #0
-; CHECK-NEXT:    shadd v0.8h, v0.8h, v1.8h
+; CHECK-NEXT:    uhadd   v0.8b, v0.8b, v1.8b
+; CHECK-NEXT:    ushll   v0.8h, v0.8b, #0
 ; CHECK-NEXT:    ret
   %x0 = zext <8 x i8> %a0 to <8 x i16>
   %x1 = zext <8 x i8> %a1 to <8 x i16>