[llvm] [InstCombine] Fold fneg/fabs patterns with ppc_f128 (PR #130557)

[Nikita Popov via llvm-commits]

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@@ -2637,18 +2637,15 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator &I) {
   // This is a generous interpretation for noimplicitfloat, this is not a true
   // floating-point operation.
   //
-  // Assumes any IEEE-represented type has the sign bit in the high bit.
+  // Assumes any floating point type has the sign bit in the high bit.
   // TODO: Unify with APInt matcher. This version allows undef unlike m_APInt
   Value *CastOp;
   if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&
-      match(Op1, m_MaxSignedValue()) &&
+      CastOp->getType()->isFPOrFPVectorTy() && match(Op1, m_MaxSignedValue()) &&
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nikic wrote:

@arsenm Do you mean the property "has sign bit in high bit"?

https://github.com/llvm/llvm-project/pull/130557