[llvm] [FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (PR #128095)
Michał Górny via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 23:45:24 PST 2025
mgorny wrote:
Looks like these changes broke the build of Xtensa:
```
/usr/lib/ccache/bin/x86_64-pc-linux-gnu-g++ -DLLVM_EXPORTS -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__ST
DC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm_build-abi_x86_64.amd64/lib/Target/Xtensa
-I/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa -I/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm_buil
d-abi_x86_64.amd64/include -I/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include -O2 -pipe -march=native -fPIC -fno-semantic
-interposition -fvisibility-inlines-hidden -Werror=date-time -fno-lifetime-dse -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wca
st-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-nonnull -Wno-clas
s-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -std=c++17 -fvisibility=hidden -UNDEBUG -MD -MT lib/Target/Xtensa/CMakeFiles/LLVMXtensaCodeGen.dir/XtensaFrameLowering.cpp.o -MF lib/Target/Xtensa/CMakeFiles/LLVMXtensaCodeGen.dir/XtensaFrameLowering.cpp.o.d -o lib/Target/Xtensa/CMakeFiles/LLVMXtensaCodeGen.dir/XtensaFrameLowering.cpp.o -c /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp: In member function ‘virtual void llvm::XtensaFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’:
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:86:70: error: ambiguous overload for ‘operator==’ (operand types are ‘llvm::MCRegister’ and ‘llvm::Register’)
86 | IsStoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg);
| ~~~~~~~~~~~~~ ^~ ~~~
| | |
| | llvm::Register
| llvm::MCRegister
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:86:70: note: candidate: ‘operator==(unsigned int, unsigned int)’ (built-in)
86 | IsStoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg);
| ~~~~~~~~~~~~~~^~~~~~
In file included from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/CodeGen/Register.h:12,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/CodeGen/MachineOperand.h:17,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/CodeGen/MachineInstr.h:25,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/CodeGen/MachineBasicBlock.h:21,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/CodeGen/TargetFrameLowering.h:17,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.h:12,
from /var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:13:
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:80:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(const llvm::MCRegister&) const’
80 | constexpr bool operator==(const MCRegister &Other) const {
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:90:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(unsigned int) const’
90 | constexpr bool operator==(unsigned Other) const { return Reg == Other; }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:92:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(int) const’
92 | constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:95:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(llvm::MCPhysReg) const’
95 | constexpr bool operator==(MCPhysReg Other) const {
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp: In member function ‘virtual void llvm::XtensaFrameLowering::emitEpilogue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’:
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:171:72: error: ambiguous overload for ‘
operator==’ (operand types are ‘llvm::MCRegister’ and ‘llvm::Register’)
171 | IsRestoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg);
| ~~~~~~~~~~~~~ ^~ ~~~
| | |
| | llvm::Register
| llvm::MCRegister
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:171:72: note: candidate: ‘operator==(unsigned int, unsigned int)’ (built-in)
171 | IsRestoreInst = (Info.getDstReg() == DstReg) && (Info.getReg() == Reg);
| ~~~~~~~~~~~~~~^~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:80:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(const llvm::MCRegister&) const’
80 | constexpr bool operator==(const MCRegister &Other) const {
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:90:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(unsigned int) const’
90 | constexpr bool operator==(unsigned Other) const { return Reg == Other; }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:92:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(int) const’
92 | constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:95:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(llvm::MCPhysReg) const’
95 | constexpr bool operator==(MCPhysReg Other) const {
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:174:40: error: ambiguous overload for ‘
operator==’ (operand types are ‘llvm::MCRegister’ and ‘llvm::Register’)
174 | IsRestoreInst = (Info.getReg() == Reg) && (LoadFI == FI);
| ~~~~~~~~~~~~~ ^~ ~~~
| | |
| | llvm::Register
| llvm::MCRegister
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp:174:40: note: candidate: ‘operator==(unsigned int, unsigned int)’ (built-in)
174 | IsRestoreInst = (Info.getReg() == Reg) && (LoadFI == FI);
| ~~~~~~~~~~~~~~^~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:80:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(const llvm::MCRegister&) const’
80 | constexpr bool operator==(const MCRegister &Other) const {
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:90:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(unsigned int) const’
90 | constexpr bool operator==(unsigned Other) const { return Reg == Other; }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:92:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(int) const’
92 | constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
| ^~~~~~~~
/var/tmp/portage/llvm-core/llvm-21.0.0.9999/work/llvm/include/llvm/MC/MCRegister.h:95:18: note: candidate: ‘constexpr bool llvm::MCRegister::operator==(llvm::MCPhysReg) const’
95 | constexpr bool operator==(MCPhysReg Other) const {
| ^~~~~~~~
```
https://github.com/llvm/llvm-project/pull/128095
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