[llvm] [X86][NFC] Added/Updated Trigonometric functions testcases (PR #127094)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 23:30:58 PST 2025
https://github.com/JaydeepChauhan14 updated https://github.com/llvm/llvm-project/pull/127094
>From 88a4db975a875e82e6be1163898e90ec6071f8c1 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Fri, 14 Feb 2025 00:54:33 +0800
Subject: [PATCH 1/6] [X86][NFC] Added/Updated Trigonometric functions testcase
---
llvm/test/CodeGen/X86/llvm.acos.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.asin.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.atan.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.atan2.ll | 231 +++++++++++++++++++++++-----
llvm/test/CodeGen/X86/llvm.cos.ll | 82 ++++++++++
llvm/test/CodeGen/X86/llvm.cosh.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.sin.ll | 82 ++++++++++
llvm/test/CodeGen/X86/llvm.sinh.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.tan.ll | 177 +++++++++++++++++----
llvm/test/CodeGen/X86/llvm.tanh.ll | 177 +++++++++++++++++----
10 files changed, 1368 insertions(+), 266 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/llvm.cos.ll
create mode 100644 llvm/test/CodeGen/X86/llvm.sin.ll
diff --git a/llvm/test/CodeGen/X86/llvm.acos.ll b/llvm/test/CodeGen/X86/llvm.acos.ll
index 202fde8291930..1083f4ca2d707 100644
--- a/llvm/test/CodeGen/X86/llvm.acos.ll
+++ b/llvm/test/CodeGen/X86/llvm.acos.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_acosf16(half %a) nounwind {
-; CHECK-LABEL: use_acosf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq acosf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_acosf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll acosf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_acosf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq acosf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.acos.f16(half %a)
ret half %x
}
define float @use_acosf32(float %a) nounwind {
-; CHECK-LABEL: use_acosf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp acosf at PLT # TAILCALL
+; X86-LABEL: use_acosf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll acosf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_acosf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp acosf at PLT # TAILCALL
%x = call float @llvm.acos.f32(float %a)
ret float %x
}
define double @use_acosf64(double %a) nounwind {
-; CHECK-LABEL: use_acosf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp acos at PLT # TAILCALL
+; X86-LABEL: use_acosf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll acos
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_acosf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp acos at PLT # TAILCALL
%x = call double @llvm.acos.f64(double %a)
ret double %x
}
define x86_fp80 @use_acosf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_acosf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq acosl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_acosf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll acosl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_acosf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq acosl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.acos.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_acosfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_acosfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp acosf128 at PLT # TAILCALL
+; X86-LABEL: use_acosfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll acosl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_acosfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp acosf128 at PLT # TAILCALL
%x = call fp128 @llvm.acos.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_acosppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_acosppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq acosl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_acosppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll acosl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_acosppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq acosl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.acos.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.acos.f64(double)
declare x86_fp80 @llvm.acos.f80(x86_fp80)
declare fp128 @llvm.acos.f128(fp128)
declare ppc_fp128 @llvm.acos.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.asin.ll b/llvm/test/CodeGen/X86/llvm.asin.ll
index 1e047d01c703c..14f5874894254 100644
--- a/llvm/test/CodeGen/X86/llvm.asin.ll
+++ b/llvm/test/CodeGen/X86/llvm.asin.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_asinf16(half %a) nounwind {
-; CHECK-LABEL: use_asinf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq asinf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_asinf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll asinf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_asinf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq asinf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.asin.f16(half %a)
ret half %x
}
define float @use_asinf32(float %a) nounwind {
-; CHECK-LABEL: use_asinf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp asinf at PLT # TAILCALL
+; X86-LABEL: use_asinf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll asinf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_asinf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp asinf at PLT # TAILCALL
%x = call float @llvm.asin.f32(float %a)
ret float %x
}
define double @use_asinf64(double %a) nounwind {
-; CHECK-LABEL: use_asinf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp asin at PLT # TAILCALL
+; X86-LABEL: use_asinf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll asin
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_asinf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp asin at PLT # TAILCALL
%x = call double @llvm.asin.f64(double %a)
ret double %x
}
define x86_fp80 @use_asinf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_asinf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq asinl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_asinf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll asinl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_asinf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq asinl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.asin.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_asinfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_asinfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp asinf128 at PLT # TAILCALL
+; X86-LABEL: use_asinfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll asinl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_asinfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp asinf128 at PLT # TAILCALL
%x = call fp128 @llvm.asin.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_asinppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq asinl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_asinppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll asinl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_asinppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq asinl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.asin.f64(double)
declare x86_fp80 @llvm.asin.f80(x86_fp80)
declare fp128 @llvm.asin.f128(fp128)
declare ppc_fp128 @llvm.asin.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.atan.ll b/llvm/test/CodeGen/X86/llvm.atan.ll
index d33ef7fd3ac5f..aca5080e07eb9 100644
--- a/llvm/test/CodeGen/X86/llvm.atan.ll
+++ b/llvm/test/CodeGen/X86/llvm.atan.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_atanf16(half %a) nounwind {
-; CHECK-LABEL: use_atanf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq atanf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_atanf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atanf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atanf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq atanf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.atan.f16(half %a)
ret half %x
}
define float @use_atanf32(float %a) nounwind {
-; CHECK-LABEL: use_atanf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atanf at PLT # TAILCALL
+; X86-LABEL: use_atanf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atanf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atanf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp atanf at PLT # TAILCALL
%x = call float @llvm.atan.f32(float %a)
ret float %x
}
define double @use_atanf64(double %a) nounwind {
-; CHECK-LABEL: use_atanf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atan at PLT # TAILCALL
+; X86-LABEL: use_atanf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll atan
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atanf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp atan at PLT # TAILCALL
%x = call double @llvm.atan.f64(double %a)
ret double %x
}
define x86_fp80 @use_atanf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_atanf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq atanl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_atanf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll atanl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atanf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq atanl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.atan.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_atanfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_atanfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atanf128 at PLT # TAILCALL
+; X86-LABEL: use_atanfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll atanl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_atanfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp atanf128 at PLT # TAILCALL
%x = call fp128 @llvm.atan.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_atanppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_atanppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq atanl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_atanppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll atanl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atanppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq atanl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.atan.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.atan.f64(double)
declare x86_fp80 @llvm.atan.f80(x86_fp80)
declare fp128 @llvm.atan.f128(fp128)
declare ppc_fp128 @llvm.atan.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.atan2.ll b/llvm/test/CodeGen/X86/llvm.atan2.ll
index ef2e4be36203b..f02a469479fc4 100644
--- a/llvm/test/CodeGen/X86/llvm.atan2.ll
+++ b/llvm/test/CodeGen/X86/llvm.atan2.ll
@@ -1,73 +1,215 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_atan2f16(half %a, half %b) nounwind {
-; CHECK-LABEL: use_atan2f16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT: movaps %xmm1, %xmm0
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
-; CHECK-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
-; CHECK-NEXT: # xmm0 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: movss (%rsp), %xmm1 # 4-byte Reload
-; CHECK-NEXT: # xmm1 = mem[0],zero,zero,zero
-; CHECK-NEXT: callq atan2f at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_atan2f16:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl %esi, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: flds {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atan2f
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atan2f16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; X64-NEXT: movaps %xmm1, %xmm0
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
+; X64-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
+; X64-NEXT: # xmm0 = mem[0],zero,zero,zero
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: movss (%rsp), %xmm1 # 4-byte Reload
+; X64-NEXT: # xmm1 = mem[0],zero,zero,zero
+; X64-NEXT: callq atan2f at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.atan2.f16(half %a, half %b)
ret half %x
}
define float @use_atan2f32(float %a, float %b) nounwind {
-; CHECK-LABEL: use_atan2f32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atan2f at PLT # TAILCALL
+; X86-LABEL: use_atan2f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atan2f
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atan2f32:
+; X64: # %bb.0:
+; X64-NEXT: jmp atan2f at PLT # TAILCALL
%x = call float @llvm.atan2.f32(float %a, float %b)
ret float %x
}
define double @use_atan2f64(double %a, double %b) nounwind {
-; CHECK-LABEL: use_atan2f64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atan2 at PLT # TAILCALL
+; X86-LABEL: use_atan2f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $28, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll atan2
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atan2f64:
+; X64: # %bb.0:
+; X64-NEXT: jmp atan2 at PLT # TAILCALL
%x = call double @llvm.atan2.f64(double %a, double %b)
ret double %x
}
define x86_fp80 @use_atan2f80(x86_fp80 %a, x86_fp80 %b) nounwind {
-; CHECK-LABEL: use_atan2f80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $40, %rsp
-; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
-; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
-; CHECK-NEXT: fstpt {{[0-9]+}}(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq atan2l at PLT
-; CHECK-NEXT: addq $40, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_atan2f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $28, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll atan2l
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atan2f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $40, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq atan2l at PLT
+; X64-NEXT: addq $40, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.atan2.f80(x86_fp80 %a, x86_fp80 %b)
ret x86_fp80 %x
}
define fp128 @use_atan2fp128(fp128 %a, fp128 %b) nounwind {
-; CHECK-LABEL: use_atan2fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp atan2f128 at PLT # TAILCALL
+; X86-LABEL: use_atan2fp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll atan2l
+; X86-NEXT: addl $44, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_atan2fp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp atan2f128 at PLT # TAILCALL
%x = call fp128 @llvm.atan2.f128(fp128 %a, fp128 %b)
ret fp128 %x
}
define ppc_fp128 @use_atan2ppc_fp128(ppc_fp128 %a, ppc_fp128 %b) nounwind {
-; CHECK-LABEL: use_atan2ppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq atan2l at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_atan2ppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $140, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll atan2l
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $140, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_atan2ppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq atan2l at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128 %a, ppc_fp128 %b)
ret ppc_fp128 %x
}
@@ -78,3 +220,8 @@ declare double @llvm.atan2.f64(double, double)
declare x86_fp80 @llvm.atan2.f80(x86_fp80, x86_fp80)
declare fp128 @llvm.atan2.f128(fp128, fp128)
declare ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128, ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.cos.ll b/llvm/test/CodeGen/X86/llvm.cos.ll
new file mode 100644
index 0000000000000..35c22b8022d9c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/llvm.cos.ll
@@ -0,0 +1,82 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=GISEL-X64
+
+define float @test_cos_f32(float %Val) nounwind {
+; X86-LABEL: test_cos_f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll cosf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_cos_f32:
+; X64: # %bb.0:
+; X64-NEXT: jmp cosf at PLT # TAILCALL
+;
+; GISEL-X64-LABEL: test_cos_f32:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: jmp cosf at PLT # TAILCALL
+ %res = call float @llvm.cos.f32(float %Val)
+ ret float %res
+}
+
+define double @test_cos_f64(double %Val) nounwind {
+; X86-LABEL: test_cos_f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll cos
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_cos_f64:
+; X64: # %bb.0:
+; X64-NEXT: jmp cos at PLT # TAILCALL
+;
+; GISEL-X64-LABEL: test_cos_f64:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: jmp cos at PLT # TAILCALL
+ %res = call double @llvm.cos.f64(double %Val)
+ ret double %res
+}
+
+define x86_fp80 @test_cos_f80(x86_fp80 %Val) nounwind {
+; X86-LABEL: test_cos_f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll cosl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_cos_f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq cosl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_cos_f80:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: subq $24, %rsp
+; GISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; GISEL-X64-NEXT: fstpt (%rsp)
+; GISEL-X64-NEXT: callq cosl at PLT
+; GISEL-X64-NEXT: addq $24, %rsp
+; GISEL-X64-NEXT: retq
+ %res = call x86_fp80 @llvm.cos.f80(x86_fp80 %Val)
+ ret x86_fp80 %res
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.cosh.ll b/llvm/test/CodeGen/X86/llvm.cosh.ll
index 5e7582c8f86a4..e85f4143424b3 100644
--- a/llvm/test/CodeGen/X86/llvm.cosh.ll
+++ b/llvm/test/CodeGen/X86/llvm.cosh.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_coshf16(half %a) nounwind {
-; CHECK-LABEL: use_coshf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq coshf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_coshf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll coshf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_coshf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq coshf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.cosh.f16(half %a)
ret half %x
}
define float @use_coshf32(float %a) nounwind {
-; CHECK-LABEL: use_coshf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp coshf at PLT # TAILCALL
+; X86-LABEL: use_coshf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll coshf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_coshf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp coshf at PLT # TAILCALL
%x = call float @llvm.cosh.f32(float %a)
ret float %x
}
define double @use_coshf64(double %a) nounwind {
-; CHECK-LABEL: use_coshf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp cosh at PLT # TAILCALL
+; X86-LABEL: use_coshf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll cosh
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_coshf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp cosh at PLT # TAILCALL
%x = call double @llvm.cosh.f64(double %a)
ret double %x
}
define x86_fp80 @use_coshf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_coshf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq coshl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_coshf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll coshl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_coshf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq coshl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.cosh.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_coshfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_coshfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp coshf128 at PLT # TAILCALL
+; X86-LABEL: use_coshfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll coshl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_coshfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp coshf128 at PLT # TAILCALL
%x = call fp128 @llvm.cosh.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_coshppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_coshppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq coshl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_coshppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll coshl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_coshppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq coshl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.cosh.f64(double)
declare x86_fp80 @llvm.cosh.f80(x86_fp80)
declare fp128 @llvm.cosh.f128(fp128)
declare ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.sin.ll b/llvm/test/CodeGen/X86/llvm.sin.ll
new file mode 100644
index 0000000000000..1d2dcefa330e4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/llvm.sin.ll
@@ -0,0 +1,82 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=GISEL-X64
+
+define float @test_sin_f32(float %Val) nounwind {
+; X86-LABEL: test_sin_f32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll sinf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_sin_f32:
+; X64: # %bb.0:
+; X64-NEXT: jmp sinf at PLT # TAILCALL
+;
+; GISEL-X64-LABEL: test_sin_f32:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: jmp sinf at PLT # TAILCALL
+ %res = call float @llvm.sin.f32(float %Val)
+ ret float %res
+}
+
+define double @test_sin_f64(double %Val) nounwind {
+; X86-LABEL: test_sin_f64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll sin
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_sin_f64:
+; X64: # %bb.0:
+; X64-NEXT: jmp sin at PLT # TAILCALL
+;
+; GISEL-X64-LABEL: test_sin_f64:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: jmp sin at PLT # TAILCALL
+ %res = call double @llvm.sin.f64(double %Val)
+ ret double %res
+}
+
+define x86_fp80 @test_sin_f80(x86_fp80 %Val) nounwind {
+; X86-LABEL: test_sin_f80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll sinl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: test_sin_f80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq sinl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_sin_f80:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: subq $24, %rsp
+; GISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; GISEL-X64-NEXT: fstpt (%rsp)
+; GISEL-X64-NEXT: callq sinl at PLT
+; GISEL-X64-NEXT: addq $24, %rsp
+; GISEL-X64-NEXT: retq
+ %res = call x86_fp80 @llvm.sin.f80(x86_fp80 %Val)
+ ret x86_fp80 %res
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.sinh.ll b/llvm/test/CodeGen/X86/llvm.sinh.ll
index ba228421117f0..1e71404e3d533 100644
--- a/llvm/test/CodeGen/X86/llvm.sinh.ll
+++ b/llvm/test/CodeGen/X86/llvm.sinh.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_sinhf16(half %a) nounwind {
-; CHECK-LABEL: use_sinhf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq sinhf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_sinhf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll sinhf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_sinhf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq sinhf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.sinh.f16(half %a)
ret half %x
}
define float @use_sinhf32(float %a) nounwind {
-; CHECK-LABEL: use_sinhf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp sinhf at PLT # TAILCALL
+; X86-LABEL: use_sinhf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll sinhf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_sinhf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp sinhf at PLT # TAILCALL
%x = call float @llvm.sinh.f32(float %a)
ret float %x
}
define double @use_sinhf64(double %a) nounwind {
-; CHECK-LABEL: use_sinhf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp sinh at PLT # TAILCALL
+; X86-LABEL: use_sinhf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll sinh
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_sinhf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp sinh at PLT # TAILCALL
%x = call double @llvm.sinh.f64(double %a)
ret double %x
}
define x86_fp80 @use_sinhf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_sinhf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq sinhl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_sinhf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll sinhl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_sinhf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq sinhl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.sinh.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_sinhfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_sinhfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp sinhf128 at PLT # TAILCALL
+; X86-LABEL: use_sinhfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll sinhl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_sinhfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp sinhf128 at PLT # TAILCALL
%x = call fp128 @llvm.sinh.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_sinhppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_sinhppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq sinhl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_sinhppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll sinhl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_sinhppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq sinhl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.sinh.f64(double)
declare x86_fp80 @llvm.sinh.f80(x86_fp80)
declare fp128 @llvm.sinh.f128(fp128)
declare ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.tan.ll b/llvm/test/CodeGen/X86/llvm.tan.ll
index 24b30038687f2..01b97b1ca360b 100644
--- a/llvm/test/CodeGen/X86/llvm.tan.ll
+++ b/llvm/test/CodeGen/X86/llvm.tan.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_tanf16(half %a) nounwind {
-; CHECK-LABEL: use_tanf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq tanf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq tanf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.tan.f16(half %a)
ret half %x
}
define float @use_tanf32(float %a) nounwind {
-; CHECK-LABEL: use_tanf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tanf at PLT # TAILCALL
+; X86-LABEL: use_tanf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp tanf at PLT # TAILCALL
%x = call float @llvm.tan.f32(float %a)
ret float %x
}
define double @use_tanf64(double %a) nounwind {
-; CHECK-LABEL: use_tanf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tan at PLT # TAILCALL
+; X86-LABEL: use_tanf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll tan
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp tan at PLT # TAILCALL
%x = call double @llvm.tan.f64(double %a)
ret double %x
}
define x86_fp80 @use_tanf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_tanf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq tanl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll tanl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq tanl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.tan.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_tanfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_tanfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tanf128 at PLT # TAILCALL
+; X86-LABEL: use_tanfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll tanl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_tanfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp tanf128 at PLT # TAILCALL
%x = call fp128 @llvm.tan.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_tanppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_tanppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq tanl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll tanl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq tanl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.tan.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.tan.f64(double)
declare x86_fp80 @llvm.tan.f80(x86_fp80)
declare fp128 @llvm.tan.f128(fp128)
declare ppc_fp128 @llvm.tan.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.tanh.ll b/llvm/test/CodeGen/X86/llvm.tanh.ll
index 7119c401c8040..406601c331f6a 100644
--- a/llvm/test/CodeGen/X86/llvm.tanh.ll
+++ b/llvm/test/CodeGen/X86/llvm.tanh.ll
@@ -1,63 +1,171 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
define half @use_tanhf16(half %a) nounwind {
-; CHECK-LABEL: use_tanhf16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __extendhfsf2 at PLT
-; CHECK-NEXT: callq tanhf at PLT
-; CHECK-NEXT: callq __truncsfhf2 at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanhf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll __gnu_h2f_ieee
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanhf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __gnu_f2h_ieee
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanhf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq tanhf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call half @llvm.tanh.f16(half %a)
ret half %x
}
define float @use_tanhf32(float %a) nounwind {
-; CHECK-LABEL: use_tanhf32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tanhf at PLT # TAILCALL
+; X86-LABEL: use_tanhf32:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanhf
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanhf32:
+; X64: # %bb.0:
+; X64-NEXT: jmp tanhf at PLT # TAILCALL
%x = call float @llvm.tanh.f32(float %a)
ret float %x
}
define double @use_tanhf64(double %a) nounwind {
-; CHECK-LABEL: use_tanhf64:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tanh at PLT # TAILCALL
+; X86-LABEL: use_tanhf64:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll tanh
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanhf64:
+; X64: # %bb.0:
+; X64-NEXT: jmp tanh at PLT # TAILCALL
%x = call double @llvm.tanh.f64(double %a)
ret double %x
}
define x86_fp80 @use_tanhf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_tanhf80:
-; CHECK: # %bb.0:
-; CHECK-NEXT: subq $24, %rsp
-; CHECK-NEXT: fldt 32(%rsp)
-; CHECK-NEXT: fstpt (%rsp)
-; CHECK-NEXT: callq tanhl at PLT
-; CHECK-NEXT: addq $24, %rsp
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanhf80:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll tanhl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanhf80:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fstpt (%rsp)
+; X64-NEXT: callq tanhl at PLT
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: retq
%x = call x86_fp80 @llvm.tanh.f80(x86_fp80 %a)
ret x86_fp80 %x
}
define fp128 @use_tanhfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_tanhfp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: jmp tanhf128 at PLT # TAILCALL
+; X86-LABEL: use_tanhfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $20, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll tanhl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %edi, 12(%esi)
+; X86-NEXT: movl %edx, 8(%esi)
+; X86-NEXT: movl %ecx, 4(%esi)
+; X86-NEXT: movl %eax, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $20, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: use_tanhfp128:
+; X64: # %bb.0:
+; X64-NEXT: jmp tanhf128 at PLT # TAILCALL
%x = call fp128 @llvm.tanh.f128(fp128 %a)
ret fp128 %x
}
define ppc_fp128 @use_tanhppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_tanhppc_fp128:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq tanhl at PLT
-; CHECK-NEXT: popq %rax
-; CHECK-NEXT: retq
+; X86-LABEL: use_tanhppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $92, %esp
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl (%esp)
+; X86-NEXT: calll tanhl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $92, %esp
+; X86-NEXT: retl
+;
+; X64-LABEL: use_tanhppc_fp128:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq tanhl at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
%x = call ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128 %a)
ret ppc_fp128 %x
}
@@ -68,3 +176,8 @@ declare double @llvm.tanh.f64(double)
declare x86_fp80 @llvm.tanh.f80(x86_fp80)
declare fp128 @llvm.tanh.f128(fp128)
declare ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GISEL-X64: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X64: {{.*}}
+; SDAG-X86: {{.*}}
>From 7cab9762a3eceaee9d28d0317e4906e78d85e5ee Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Mon, 17 Feb 2025 09:39:58 -0800
Subject: [PATCH 2/6] Moved fp16, fp128, ppcf128 types test to
{fp16,fp128,ppcf128}-libcalls.ll
---
llvm/test/CodeGen/X86/fp128-libcalls.ll | 268 ++++++++++++++
llvm/test/CodeGen/X86/fp16-libcalls.ll | 419 ++++++++++++++++++++++
llvm/test/CodeGen/X86/llvm.acos.ll | 113 ------
llvm/test/CodeGen/X86/llvm.asin.ll | 113 ------
llvm/test/CodeGen/X86/llvm.atan.ll | 113 ------
llvm/test/CodeGen/X86/llvm.atan2.ll | 149 --------
llvm/test/CodeGen/X86/llvm.cosh.ll | 113 ------
llvm/test/CodeGen/X86/llvm.sinh.ll | 113 ------
llvm/test/CodeGen/X86/llvm.tan.ll | 113 ------
llvm/test/CodeGen/X86/llvm.tanh.ll | 113 ------
llvm/test/CodeGen/X86/ppcf128-libcalls.ll | 354 ++++++++++++++++++
11 files changed, 1041 insertions(+), 940 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/ppcf128-libcalls.ll
diff --git a/llvm/test/CodeGen/X86/fp128-libcalls.ll b/llvm/test/CodeGen/X86/fp128-libcalls.ll
index bb75ec1085119..342f802d2c5be 100644
--- a/llvm/test/CodeGen/X86/fp128-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp128-libcalls.ll
@@ -921,3 +921,271 @@ entry:
ret fp128 %call
}
declare fp128 @llvm.fma.f128(fp128, fp128, fp128)
+
+define fp128 @use_acosfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_acosfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp acosl at PLT # TAILCALL
+;
+; GNU-LABEL: use_acosfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp acosf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_acosfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll acosl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.acos.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_asinfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_asinfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp asinl at PLT # TAILCALL
+;
+; GNU-LABEL: use_asinfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp asinf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_asinfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll asinl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.asin.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_atanfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_atanfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp atanl at PLT # TAILCALL
+;
+; GNU-LABEL: use_atanfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp atanf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_atanfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll atanl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.atan.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_atan2fp128(fp128 %a, fp128 %b) nounwind {
+; ANDROID-LABEL: use_atan2fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp atan2l at PLT # TAILCALL
+;
+; GNU-LABEL: use_atan2fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp atan2f128 at PLT # TAILCALL
+;
+; X86-LABEL: use_atan2fp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll atan2l
+; X86-NEXT: addl $44, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.atan2.f128(fp128 %a, fp128 %b)
+ ret fp128 %x
+}
+
+define fp128 @use_coshfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_coshfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp coshl at PLT # TAILCALL
+;
+; GNU-LABEL: use_coshfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp coshf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_coshfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll coshl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.cosh.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_sinhfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_sinhfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp sinhl at PLT # TAILCALL
+;
+; GNU-LABEL: use_sinhfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp sinhf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_sinhfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll sinhl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.sinh.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_tanfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_tanfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp tanl at PLT # TAILCALL
+;
+; GNU-LABEL: use_tanfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp tanf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_tanfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll tanl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.tan.f128(fp128 %a)
+ ret fp128 %x
+}
+
+define fp128 @use_tanhfp128(fp128 %a) nounwind {
+; ANDROID-LABEL: use_tanhfp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: jmp tanhl at PLT # TAILCALL
+;
+; GNU-LABEL: use_tanhfp128:
+; GNU: # %bb.0:
+; GNU-NEXT: jmp tanhf128 at PLT # TAILCALL
+;
+; X86-LABEL: use_tanhfp128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl {{[0-9]+}}(%esp)
+; X86-NEXT: pushl %eax
+; X86-NEXT: calll tanhl
+; X86-NEXT: addl $28, %esp
+; X86-NEXT: movaps (%esp), %xmm0
+; X86-NEXT: movaps %xmm0, (%esi)
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: retl $4
+ %x = call fp128 @llvm.tanh.f128(fp128 %a)
+ ret fp128 %x
+}
diff --git a/llvm/test/CodeGen/X86/fp16-libcalls.ll b/llvm/test/CodeGen/X86/fp16-libcalls.ll
index 3af8b1aec1feb..54a89351596fc 100644
--- a/llvm/test/CodeGen/X86/fp16-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp16-libcalls.ll
@@ -1188,3 +1188,422 @@ define void @test_half_trunc(half %a0, ptr %p0) nounwind {
store half %res, ptr %p0, align 2
ret void
}
+
+define half @use_acosf16(half %a) nounwind {
+; F16C-LABEL: use_acosf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq acosf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_acosf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq acosf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_acosf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq acosf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_acosf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll acosf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.acos.f16(half %a)
+ ret half %x
+}
+
+define half @use_asinf16(half %a) nounwind {
+; F16C-LABEL: use_asinf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq asinf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_asinf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq asinf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_asinf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq asinf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_asinf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll asinf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.asin.f16(half %a)
+ ret half %x
+}
+
+define half @use_atanf16(half %a) nounwind {
+; F16C-LABEL: use_atanf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq atanf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_atanf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq atanf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_atanf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq atanf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_atanf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atanf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.atan.f16(half %a)
+ ret half %x
+}
+
+define half @use_atan2f16(half %a, half %b) nounwind {
+; F16C-LABEL: use_atan2f16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
+; F16C-NEXT: callq atan2f at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_atan2f16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: vcvtsh2ss %xmm1, %xmm1, %xmm1
+; FP16-NEXT: callq atan2f at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_atan2f16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; X64-NEXT: movaps %xmm1, %xmm0
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
+; X64-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
+; X64-NEXT: # xmm0 = mem[0],zero,zero,zero
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: movss (%rsp), %xmm1 # 4-byte Reload
+; X64-NEXT: # xmm1 = mem[0],zero,zero,zero
+; X64-NEXT: callq atan2f at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_atan2f16:
+; X86: # %bb.0:
+; X86-NEXT: subl $60, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: movdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill
+; X86-NEXT: movdqa {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps {{[0-9]+}}(%esp)
+; X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll atan2f
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $60, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.atan2.f16(half %a, half %b)
+ ret half %x
+}
+
+define float @test_cos_f32(float %Val) nounwind {
+; F16C-LABEL: test_cos_f32:
+; F16C: # %bb.0:
+; F16C-NEXT: jmp cosf at PLT # TAILCALL
+;
+; FP16-LABEL: test_cos_f32:
+; FP16: # %bb.0:
+; FP16-NEXT: jmp cosf at PLT # TAILCALL
+;
+; X64-LABEL: test_cos_f32:
+; X64: # %bb.0:
+; X64-NEXT: jmp cosf at PLT # TAILCALL
+;
+; X86-LABEL: test_cos_f32:
+; X86: # %bb.0:
+; X86-NEXT: jmp cosf # TAILCALL
+ %res = call float @llvm.cos.f32(float %Val)
+ ret float %res
+}
+
+define half @use_coshf16(half %a) nounwind {
+; F16C-LABEL: use_coshf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq coshf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_coshf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq coshf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_coshf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq coshf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_coshf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll coshf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.cosh.f16(half %a)
+ ret half %x
+}
+
+define float @test_sin_f32(float %Val) nounwind {
+; F16C-LABEL: test_sin_f32:
+; F16C: # %bb.0:
+; F16C-NEXT: jmp sinf at PLT # TAILCALL
+;
+; FP16-LABEL: test_sin_f32:
+; FP16: # %bb.0:
+; FP16-NEXT: jmp sinf at PLT # TAILCALL
+;
+; X64-LABEL: test_sin_f32:
+; X64: # %bb.0:
+; X64-NEXT: jmp sinf at PLT # TAILCALL
+;
+; X86-LABEL: test_sin_f32:
+; X86: # %bb.0:
+; X86-NEXT: jmp sinf # TAILCALL
+ %res = call float @llvm.sin.f32(float %Val)
+ ret float %res
+}
+
+define half @use_sinhf16(half %a) nounwind {
+; F16C-LABEL: use_sinhf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq sinhf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_sinhf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq sinhf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_sinhf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq sinhf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_sinhf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll sinhf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.sinh.f16(half %a)
+ ret half %x
+}
+
+define half @use_tanf16(half %a) nounwind {
+; F16C-LABEL: use_tanf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq tanf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_tanf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq tanf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_tanf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq tanf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_tanf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.tan.f16(half %a)
+ ret half %x
+}
+
+define half @use_tanhf16(half %a) nounwind {
+; F16C-LABEL: use_tanhf16:
+; F16C: # %bb.0:
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq tanhf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
+;
+; FP16-LABEL: use_tanhf16:
+; FP16: # %bb.0:
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq tanhf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
+;
+; X64-LABEL: use_tanhf16:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq tanhf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
+;
+; X86-LABEL: use_tanhf16:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll tanhf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %x = call half @llvm.tanh.f16(half %a)
+ ret half %x
+}
diff --git a/llvm/test/CodeGen/X86/llvm.acos.ll b/llvm/test/CodeGen/X86/llvm.acos.ll
index 1083f4ca2d707..9ae67495ffccb 100644
--- a/llvm/test/CodeGen/X86/llvm.acos.ll
+++ b/llvm/test/CodeGen/X86/llvm.acos.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_acosf16(half %a) nounwind {
-; X86-LABEL: use_acosf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll acosf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_acosf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq acosf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.acos.f16(half %a)
- ret half %x
-}
-
define float @use_acosf32(float %a) nounwind {
; X86-LABEL: use_acosf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_acosf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_acosfp128(fp128 %a) nounwind {
-; X86-LABEL: use_acosfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll acosl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_acosfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp acosf128 at PLT # TAILCALL
- %x = call fp128 @llvm.acos.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_acosppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_acosppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll acosl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_acosppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq acosl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.acos.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.acos.f16(half)
declare float @llvm.acos.f32(float)
declare double @llvm.acos.f64(double)
declare x86_fp80 @llvm.acos.f80(x86_fp80)
-declare fp128 @llvm.acos.f128(fp128)
-declare ppc_fp128 @llvm.acos.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.asin.ll b/llvm/test/CodeGen/X86/llvm.asin.ll
index 14f5874894254..f17e33ae3e8e3 100644
--- a/llvm/test/CodeGen/X86/llvm.asin.ll
+++ b/llvm/test/CodeGen/X86/llvm.asin.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_asinf16(half %a) nounwind {
-; X86-LABEL: use_asinf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll asinf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_asinf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq asinf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.asin.f16(half %a)
- ret half %x
-}
-
define float @use_asinf32(float %a) nounwind {
; X86-LABEL: use_asinf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_asinf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_asinfp128(fp128 %a) nounwind {
-; X86-LABEL: use_asinfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll asinl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_asinfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp asinf128 at PLT # TAILCALL
- %x = call fp128 @llvm.asin.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_asinppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll asinl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_asinppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq asinl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.asin.f16(half)
declare float @llvm.asin.f32(float)
declare double @llvm.asin.f64(double)
declare x86_fp80 @llvm.asin.f80(x86_fp80)
-declare fp128 @llvm.asin.f128(fp128)
-declare ppc_fp128 @llvm.asin.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.atan.ll b/llvm/test/CodeGen/X86/llvm.atan.ll
index aca5080e07eb9..013b5e75a63b7 100644
--- a/llvm/test/CodeGen/X86/llvm.atan.ll
+++ b/llvm/test/CodeGen/X86/llvm.atan.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_atanf16(half %a) nounwind {
-; X86-LABEL: use_atanf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll atanf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_atanf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq atanf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.atan.f16(half %a)
- ret half %x
-}
-
define float @use_atanf32(float %a) nounwind {
; X86-LABEL: use_atanf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_atanf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_atanfp128(fp128 %a) nounwind {
-; X86-LABEL: use_atanfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll atanl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_atanfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp atanf128 at PLT # TAILCALL
- %x = call fp128 @llvm.atan.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_atanppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_atanppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll atanl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_atanppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq atanl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.atan.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.atan.f16(half)
declare float @llvm.atan.f32(float)
declare double @llvm.atan.f64(double)
declare x86_fp80 @llvm.atan.f80(x86_fp80)
-declare fp128 @llvm.atan.f128(fp128)
-declare ppc_fp128 @llvm.atan.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.atan2.ll b/llvm/test/CodeGen/X86/llvm.atan2.ll
index f02a469479fc4..b72cb1098a87f 100644
--- a/llvm/test/CodeGen/X86/llvm.atan2.ll
+++ b/llvm/test/CodeGen/X86/llvm.atan2.ll
@@ -4,48 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_atan2f16(half %a, half %b) nounwind {
-; X86-LABEL: use_atan2f16:
-; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $24, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl %esi, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps {{[0-9]+}}(%esp)
-; X86-NEXT: flds {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll atan2f
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $24, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: retl
-;
-; X64-LABEL: use_atan2f16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; X64-NEXT: movaps %xmm1, %xmm0
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: movss %xmm0, (%rsp) # 4-byte Spill
-; X64-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
-; X64-NEXT: # xmm0 = mem[0],zero,zero,zero
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: movss (%rsp), %xmm1 # 4-byte Reload
-; X64-NEXT: # xmm1 = mem[0],zero,zero,zero
-; X64-NEXT: callq atan2f at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.atan2.f16(half %a, half %b)
- ret half %x
-}
-
define float @use_atan2f32(float %a, float %b) nounwind {
; X86-LABEL: use_atan2f32:
; X86: # %bb.0:
@@ -110,116 +68,9 @@ define x86_fp80 @use_atan2f80(x86_fp80 %a, x86_fp80 %b) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_atan2fp128(fp128 %a, fp128 %b) nounwind {
-; X86-LABEL: use_atan2fp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll atan2l
-; X86-NEXT: addl $44, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_atan2fp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp atan2f128 at PLT # TAILCALL
- %x = call fp128 @llvm.atan2.f128(fp128 %a, fp128 %b)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_atan2ppc_fp128(ppc_fp128 %a, ppc_fp128 %b) nounwind {
-; X86-LABEL: use_atan2ppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $140, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll atan2l
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $140, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_atan2ppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq atan2l at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128 %a, ppc_fp128 %b)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.atan2.f16(half, half)
declare float @llvm.atan2.f32(float, float)
declare double @llvm.atan2.f64(double, double)
declare x86_fp80 @llvm.atan2.f80(x86_fp80, x86_fp80)
-declare fp128 @llvm.atan2.f128(fp128, fp128)
-declare ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128, ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.cosh.ll b/llvm/test/CodeGen/X86/llvm.cosh.ll
index e85f4143424b3..5f0c2f1337eeb 100644
--- a/llvm/test/CodeGen/X86/llvm.cosh.ll
+++ b/llvm/test/CodeGen/X86/llvm.cosh.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_coshf16(half %a) nounwind {
-; X86-LABEL: use_coshf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll coshf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_coshf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq coshf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.cosh.f16(half %a)
- ret half %x
-}
-
define float @use_coshf32(float %a) nounwind {
; X86-LABEL: use_coshf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_coshf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_coshfp128(fp128 %a) nounwind {
-; X86-LABEL: use_coshfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll coshl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_coshfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp coshf128 at PLT # TAILCALL
- %x = call fp128 @llvm.cosh.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_coshppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_coshppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll coshl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_coshppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq coshl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.cosh.f16(half)
declare float @llvm.cosh.f32(float)
declare double @llvm.cosh.f64(double)
declare x86_fp80 @llvm.cosh.f80(x86_fp80)
-declare fp128 @llvm.cosh.f128(fp128)
-declare ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.sinh.ll b/llvm/test/CodeGen/X86/llvm.sinh.ll
index 1e71404e3d533..de8a710b90c8f 100644
--- a/llvm/test/CodeGen/X86/llvm.sinh.ll
+++ b/llvm/test/CodeGen/X86/llvm.sinh.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_sinhf16(half %a) nounwind {
-; X86-LABEL: use_sinhf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll sinhf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_sinhf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq sinhf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.sinh.f16(half %a)
- ret half %x
-}
-
define float @use_sinhf32(float %a) nounwind {
; X86-LABEL: use_sinhf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_sinhf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_sinhfp128(fp128 %a) nounwind {
-; X86-LABEL: use_sinhfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll sinhl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_sinhfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp sinhf128 at PLT # TAILCALL
- %x = call fp128 @llvm.sinh.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_sinhppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_sinhppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll sinhl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_sinhppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq sinhl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.sinh.f16(half)
declare float @llvm.sinh.f32(float)
declare double @llvm.sinh.f64(double)
declare x86_fp80 @llvm.sinh.f80(x86_fp80)
-declare fp128 @llvm.sinh.f128(fp128)
-declare ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.tan.ll b/llvm/test/CodeGen/X86/llvm.tan.ll
index 01b97b1ca360b..32055512bc1db 100644
--- a/llvm/test/CodeGen/X86/llvm.tan.ll
+++ b/llvm/test/CodeGen/X86/llvm.tan.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_tanf16(half %a) nounwind {
-; X86-LABEL: use_tanf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll tanf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_tanf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq tanf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.tan.f16(half %a)
- ret half %x
-}
-
define float @use_tanf32(float %a) nounwind {
; X86-LABEL: use_tanf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_tanf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_tanfp128(fp128 %a) nounwind {
-; X86-LABEL: use_tanfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll tanl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_tanfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp tanf128 at PLT # TAILCALL
- %x = call fp128 @llvm.tan.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_tanppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_tanppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll tanl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_tanppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq tanl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.tan.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.tan.f16(half)
declare float @llvm.tan.f32(float)
declare double @llvm.tan.f64(double)
declare x86_fp80 @llvm.tan.f80(x86_fp80)
-declare fp128 @llvm.tan.f128(fp128)
-declare ppc_fp128 @llvm.tan.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/llvm.tanh.ll b/llvm/test/CodeGen/X86/llvm.tanh.ll
index 406601c331f6a..6911a6888eff6 100644
--- a/llvm/test/CodeGen/X86/llvm.tanh.ll
+++ b/llvm/test/CodeGen/X86/llvm.tanh.ll
@@ -4,32 +4,6 @@
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
-define half @use_tanhf16(half %a) nounwind {
-; X86-LABEL: use_tanhf16:
-; X86: # %bb.0:
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, (%esp)
-; X86-NEXT: calll __gnu_h2f_ieee
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll tanhf
-; X86-NEXT: fstps (%esp)
-; X86-NEXT: calll __gnu_f2h_ieee
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_tanhf16:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __extendhfsf2 at PLT
-; X64-NEXT: callq tanhf at PLT
-; X64-NEXT: callq __truncsfhf2 at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call half @llvm.tanh.f16(half %a)
- ret half %x
-}
-
define float @use_tanhf32(float %a) nounwind {
; X86-LABEL: use_tanhf32:
; X86: # %bb.0:
@@ -86,96 +60,9 @@ define x86_fp80 @use_tanhf80(x86_fp80 %a) nounwind {
ret x86_fp80 %x
}
-define fp128 @use_tanhfp128(fp128 %a) nounwind {
-; X86-LABEL: use_tanhfp128:
-; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: subl $20, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: subl $12, %esp
-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl {{[0-9]+}}(%esp)
-; X86-NEXT: pushl %eax
-; X86-NEXT: calll tanhl
-; X86-NEXT: addl $28, %esp
-; X86-NEXT: movl (%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl %edi, 12(%esi)
-; X86-NEXT: movl %edx, 8(%esi)
-; X86-NEXT: movl %ecx, 4(%esi)
-; X86-NEXT: movl %eax, (%esi)
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: addl $20, %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: retl $4
-;
-; X64-LABEL: use_tanhfp128:
-; X64: # %bb.0:
-; X64-NEXT: jmp tanhf128 at PLT # TAILCALL
- %x = call fp128 @llvm.tanh.f128(fp128 %a)
- ret fp128 %x
-}
-
-define ppc_fp128 @use_tanhppc_fp128(ppc_fp128 %a) nounwind {
-; X86-LABEL: use_tanhppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $92, %esp
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl (%esp)
-; X86-NEXT: calll tanhl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $92, %esp
-; X86-NEXT: retl
-;
-; X64-LABEL: use_tanhppc_fp128:
-; X64: # %bb.0:
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq tanhl at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
- %x = call ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-declare half @llvm.tanh.f16(half)
declare float @llvm.tanh.f32(float)
declare double @llvm.tanh.f64(double)
declare x86_fp80 @llvm.tanh.f80(x86_fp80)
-declare fp128 @llvm.tanh.f128(fp128)
-declare ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GISEL-X64: {{.*}}
; GISEL-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/ppcf128-libcalls.ll b/llvm/test/CodeGen/X86/ppcf128-libcalls.ll
new file mode 100644
index 0000000000000..29aca2fdad3ed
--- /dev/null
+++ b/llvm/test/CodeGen/X86/ppcf128-libcalls.ll
@@ -0,0 +1,354 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android \
+; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=ANDROID
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu \
+; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=GNU
+; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=sse2 \
+; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=X86
+
+; Check all soft floating point library function calls.
+
+
+define ppc_fp128 @use_acosppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_acosppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq acosl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_acosppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq acosl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_acosppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll acosl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.acos.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_asinppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq asinl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_asinppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq asinl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_asinppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll asinl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_atanppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_atanppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq atanl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_atanppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq atanl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_atanppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll atanl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.atan.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_atan2ppc_fp128(ppc_fp128 %a, ppc_fp128 %b) nounwind {
+; ANDROID-LABEL: use_atan2ppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq atan2l at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_atan2ppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq atan2l at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_atan2ppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $108, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
+; X86-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
+; X86-NEXT: movlps %xmm3, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
+; X86-NEXT: movlps %xmm2, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll atan2l
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $108, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128 %a, ppc_fp128 %b)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_coshppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_coshppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq coshl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_coshppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq coshl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_coshppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll coshl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_sinhppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_sinhppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq sinhl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_sinhppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq sinhl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_sinhppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll sinhl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_tanppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_tanppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq tanl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_tanppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq tanl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_tanppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll tanl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.tan.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
+
+define ppc_fp128 @use_tanhppc_fp128(ppc_fp128 %a) nounwind {
+; ANDROID-LABEL: use_tanhppc_fp128:
+; ANDROID: # %bb.0:
+; ANDROID-NEXT: pushq %rax
+; ANDROID-NEXT: callq tanhl at PLT
+; ANDROID-NEXT: popq %rax
+; ANDROID-NEXT: retq
+;
+; GNU-LABEL: use_tanhppc_fp128:
+; GNU: # %bb.0:
+; GNU-NEXT: pushq %rax
+; GNU-NEXT: callq tanhl at PLT
+; GNU-NEXT: popq %rax
+; GNU-NEXT: retq
+;
+; X86-LABEL: use_tanhppc_fp128:
+; X86: # %bb.0:
+; X86-NEXT: subl $76, %esp
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, (%esp)
+; X86-NEXT: calll tanhl
+; X86-NEXT: fxch %st(1)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: fstpl {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NEXT: addl $76, %esp
+; X86-NEXT: retl
+ %x = call ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128 %a)
+ ret ppc_fp128 %x
+}
>From fb4342f9c23ec40c9f11d17e1efd7faf45f9a192 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Wed, 19 Feb 2025 21:43:49 -0800
Subject: [PATCH 3/6] Addressed the review comment1
---
llvm/test/CodeGen/X86/fp16-libcalls.ll | 94 ++++++++++++++++++++------
1 file changed, 72 insertions(+), 22 deletions(-)
diff --git a/llvm/test/CodeGen/X86/fp16-libcalls.ll b/llvm/test/CodeGen/X86/fp16-libcalls.ll
index 54a89351596fc..b6fc3381f3dee 100644
--- a/llvm/test/CodeGen/X86/fp16-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp16-libcalls.ll
@@ -1388,24 +1388,49 @@ define half @use_atan2f16(half %a, half %b) nounwind {
ret half %x
}
-define float @test_cos_f32(float %Val) nounwind {
-; F16C-LABEL: test_cos_f32:
+define half @test_cos_f16(half %Val) nounwind {
+; F16C-LABEL: test_cos_f16:
; F16C: # %bb.0:
-; F16C-NEXT: jmp cosf at PLT # TAILCALL
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq cosf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
;
-; FP16-LABEL: test_cos_f32:
+; FP16-LABEL: test_cos_f16:
; FP16: # %bb.0:
-; FP16-NEXT: jmp cosf at PLT # TAILCALL
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq cosf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
;
-; X64-LABEL: test_cos_f32:
+; X64-LABEL: test_cos_f16:
; X64: # %bb.0:
-; X64-NEXT: jmp cosf at PLT # TAILCALL
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq cosf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
;
-; X86-LABEL: test_cos_f32:
+; X86-LABEL: test_cos_f16:
; X86: # %bb.0:
-; X86-NEXT: jmp cosf # TAILCALL
- %res = call float @llvm.cos.f32(float %Val)
- ret float %res
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll cosf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %res = call half @llvm.cos.f16(half %Val)
+ ret half %res
}
define half @use_coshf16(half %a) nounwind {
@@ -1453,24 +1478,49 @@ define half @use_coshf16(half %a) nounwind {
ret half %x
}
-define float @test_sin_f32(float %Val) nounwind {
-; F16C-LABEL: test_sin_f32:
+define half @test_sin_f16(half %Val) nounwind {
+; F16C-LABEL: test_sin_f16:
; F16C: # %bb.0:
-; F16C-NEXT: jmp sinf at PLT # TAILCALL
+; F16C-NEXT: pushq %rax
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: callq sinf at PLT
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: popq %rax
+; F16C-NEXT: retq
;
-; FP16-LABEL: test_sin_f32:
+; FP16-LABEL: test_sin_f16:
; FP16: # %bb.0:
-; FP16-NEXT: jmp sinf at PLT # TAILCALL
+; FP16-NEXT: pushq %rax
+; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
+; FP16-NEXT: callq sinf at PLT
+; FP16-NEXT: vcvtss2sh %xmm0, %xmm0, %xmm0
+; FP16-NEXT: popq %rax
+; FP16-NEXT: retq
;
-; X64-LABEL: test_sin_f32:
+; X64-LABEL: test_sin_f16:
; X64: # %bb.0:
-; X64-NEXT: jmp sinf at PLT # TAILCALL
+; X64-NEXT: pushq %rax
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: callq sinf at PLT
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: popq %rax
+; X64-NEXT: retq
;
-; X86-LABEL: test_sin_f32:
+; X86-LABEL: test_sin_f16:
; X86: # %bb.0:
-; X86-NEXT: jmp sinf # TAILCALL
- %res = call float @llvm.sin.f32(float %Val)
- ret float %res
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: pextrw $0, %xmm0, %eax
+; X86-NEXT: movw %ax, (%esp)
+; X86-NEXT: calll __extendhfsf2
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll sinf
+; X86-NEXT: fstps (%esp)
+; X86-NEXT: calll __truncsfhf2
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+ %res = call half @llvm.sin.f16(half %Val)
+ ret half %res
}
define half @use_sinhf16(half %a) nounwind {
>From 8f240fbd911d191164c40f7ddb17165e939acfe2 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Wed, 19 Feb 2025 22:02:15 -0800
Subject: [PATCH 4/6] Renamed functions names
---
llvm/test/CodeGen/X86/fp128-libcalls.ll | 64 +++++++--------
llvm/test/CodeGen/X86/fp16-libcalls.ll | 100 ++++++++++++------------
2 files changed, 82 insertions(+), 82 deletions(-)
diff --git a/llvm/test/CodeGen/X86/fp128-libcalls.ll b/llvm/test/CodeGen/X86/fp128-libcalls.ll
index 342f802d2c5be..0831675095d74 100644
--- a/llvm/test/CodeGen/X86/fp128-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp128-libcalls.ll
@@ -922,16 +922,16 @@ entry:
}
declare fp128 @llvm.fma.f128(fp128, fp128, fp128)
-define fp128 @use_acosfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_acosfp128:
+define fp128 @Test128Acos(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Acos:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp acosl at PLT # TAILCALL
;
-; GNU-LABEL: use_acosfp128:
+; GNU-LABEL: Test128Acos:
; GNU: # %bb.0:
; GNU-NEXT: jmp acosf128 at PLT # TAILCALL
;
-; X86-LABEL: use_acosfp128:
+; X86-LABEL: Test128Acos:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -955,16 +955,16 @@ define fp128 @use_acosfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_asinfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_asinfp128:
+define fp128 @Test128Asin(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Asin:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp asinl at PLT # TAILCALL
;
-; GNU-LABEL: use_asinfp128:
+; GNU-LABEL: Test128Asin:
; GNU: # %bb.0:
; GNU-NEXT: jmp asinf128 at PLT # TAILCALL
;
-; X86-LABEL: use_asinfp128:
+; X86-LABEL: Test128Asin:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -988,16 +988,16 @@ define fp128 @use_asinfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_atanfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_atanfp128:
+define fp128 @Test128Atan(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Atan:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp atanl at PLT # TAILCALL
;
-; GNU-LABEL: use_atanfp128:
+; GNU-LABEL: Test128Atan:
; GNU: # %bb.0:
; GNU-NEXT: jmp atanf128 at PLT # TAILCALL
;
-; X86-LABEL: use_atanfp128:
+; X86-LABEL: Test128Atan:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -1021,16 +1021,16 @@ define fp128 @use_atanfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_atan2fp128(fp128 %a, fp128 %b) nounwind {
-; ANDROID-LABEL: use_atan2fp128:
+define fp128 @Test128Atan2(fp128 %a, fp128 %b) nounwind {
+; ANDROID-LABEL: Test128Atan2:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp atan2l at PLT # TAILCALL
;
-; GNU-LABEL: use_atan2fp128:
+; GNU-LABEL: Test128Atan2:
; GNU: # %bb.0:
; GNU-NEXT: jmp atan2f128 at PLT # TAILCALL
;
-; X86-LABEL: use_atan2fp128:
+; X86-LABEL: Test128Atan2:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -1058,16 +1058,16 @@ define fp128 @use_atan2fp128(fp128 %a, fp128 %b) nounwind {
ret fp128 %x
}
-define fp128 @use_coshfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_coshfp128:
+define fp128 @Test128Cosh(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Cosh:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp coshl at PLT # TAILCALL
;
-; GNU-LABEL: use_coshfp128:
+; GNU-LABEL: Test128Cosh:
; GNU: # %bb.0:
; GNU-NEXT: jmp coshf128 at PLT # TAILCALL
;
-; X86-LABEL: use_coshfp128:
+; X86-LABEL: Test128Cosh:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -1091,16 +1091,16 @@ define fp128 @use_coshfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_sinhfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_sinhfp128:
+define fp128 @Test128Sinh(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Sinh:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp sinhl at PLT # TAILCALL
;
-; GNU-LABEL: use_sinhfp128:
+; GNU-LABEL: Test128Sinh:
; GNU: # %bb.0:
; GNU-NEXT: jmp sinhf128 at PLT # TAILCALL
;
-; X86-LABEL: use_sinhfp128:
+; X86-LABEL: Test128Sinh:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -1124,16 +1124,16 @@ define fp128 @use_sinhfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_tanfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_tanfp128:
+define fp128 @Test128Tan(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Tan:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp tanl at PLT # TAILCALL
;
-; GNU-LABEL: use_tanfp128:
+; GNU-LABEL: Test128Tan:
; GNU: # %bb.0:
; GNU-NEXT: jmp tanf128 at PLT # TAILCALL
;
-; X86-LABEL: use_tanfp128:
+; X86-LABEL: Test128Tan:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
@@ -1157,16 +1157,16 @@ define fp128 @use_tanfp128(fp128 %a) nounwind {
ret fp128 %x
}
-define fp128 @use_tanhfp128(fp128 %a) nounwind {
-; ANDROID-LABEL: use_tanhfp128:
+define fp128 @Test128Tanh(fp128 %a) nounwind {
+; ANDROID-LABEL: Test128Tanh:
; ANDROID: # %bb.0:
; ANDROID-NEXT: jmp tanhl at PLT # TAILCALL
;
-; GNU-LABEL: use_tanhfp128:
+; GNU-LABEL: Test128Tanh:
; GNU: # %bb.0:
; GNU-NEXT: jmp tanhf128 at PLT # TAILCALL
;
-; X86-LABEL: use_tanhfp128:
+; X86-LABEL: Test128Tanh:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: subl $24, %esp
diff --git a/llvm/test/CodeGen/X86/fp16-libcalls.ll b/llvm/test/CodeGen/X86/fp16-libcalls.ll
index b6fc3381f3dee..57db9636e5d24 100644
--- a/llvm/test/CodeGen/X86/fp16-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp16-libcalls.ll
@@ -1189,8 +1189,8 @@ define void @test_half_trunc(half %a0, ptr %p0) nounwind {
ret void
}
-define half @use_acosf16(half %a) nounwind {
-; F16C-LABEL: use_acosf16:
+define half @test_half_acos(half %a) nounwind {
+; F16C-LABEL: test_half_acos:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1199,7 +1199,7 @@ define half @use_acosf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_acosf16:
+; FP16-LABEL: test_half_acos:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1208,7 +1208,7 @@ define half @use_acosf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_acosf16:
+; X64-LABEL: test_half_acos:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1217,7 +1217,7 @@ define half @use_acosf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_acosf16:
+; X86-LABEL: test_half_acos:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1234,8 +1234,8 @@ define half @use_acosf16(half %a) nounwind {
ret half %x
}
-define half @use_asinf16(half %a) nounwind {
-; F16C-LABEL: use_asinf16:
+define half @test_half_asin(half %a) nounwind {
+; F16C-LABEL: test_half_asin:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1244,7 +1244,7 @@ define half @use_asinf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_asinf16:
+; FP16-LABEL: test_half_asin:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1253,7 +1253,7 @@ define half @use_asinf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_asinf16:
+; X64-LABEL: test_half_asin:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1262,7 +1262,7 @@ define half @use_asinf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_asinf16:
+; X86-LABEL: test_half_asin:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1279,8 +1279,8 @@ define half @use_asinf16(half %a) nounwind {
ret half %x
}
-define half @use_atanf16(half %a) nounwind {
-; F16C-LABEL: use_atanf16:
+define half @test_half_atan(half %a) nounwind {
+; F16C-LABEL: test_half_atan:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1289,7 +1289,7 @@ define half @use_atanf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_atanf16:
+; FP16-LABEL: test_half_atan:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1298,7 +1298,7 @@ define half @use_atanf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_atanf16:
+; X64-LABEL: test_half_atan:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1307,7 +1307,7 @@ define half @use_atanf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_atanf16:
+; X86-LABEL: test_half_atan:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1324,8 +1324,8 @@ define half @use_atanf16(half %a) nounwind {
ret half %x
}
-define half @use_atan2f16(half %a, half %b) nounwind {
-; F16C-LABEL: use_atan2f16:
+define half @test_half_atan2(half %a, half %b) nounwind {
+; F16C-LABEL: test_half_atan2:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1335,7 +1335,7 @@ define half @use_atan2f16(half %a, half %b) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_atan2f16:
+; FP16-LABEL: test_half_atan2:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1345,7 +1345,7 @@ define half @use_atan2f16(half %a, half %b) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_atan2f16:
+; X64-LABEL: test_half_atan2:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
@@ -1362,7 +1362,7 @@ define half @use_atan2f16(half %a, half %b) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_atan2f16:
+; X86-LABEL: test_half_atan2:
; X86: # %bb.0:
; X86-NEXT: subl $60, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1388,8 +1388,8 @@ define half @use_atan2f16(half %a, half %b) nounwind {
ret half %x
}
-define half @test_cos_f16(half %Val) nounwind {
-; F16C-LABEL: test_cos_f16:
+define half @test2_half_cos(half %Val) nounwind {
+; F16C-LABEL: test2_half_cos:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1398,7 +1398,7 @@ define half @test_cos_f16(half %Val) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: test_cos_f16:
+; FP16-LABEL: test2_half_cos:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1407,7 +1407,7 @@ define half @test_cos_f16(half %Val) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: test_cos_f16:
+; X64-LABEL: test2_half_cos:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1416,7 +1416,7 @@ define half @test_cos_f16(half %Val) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: test_cos_f16:
+; X86-LABEL: test2_half_cos:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1433,8 +1433,8 @@ define half @test_cos_f16(half %Val) nounwind {
ret half %res
}
-define half @use_coshf16(half %a) nounwind {
-; F16C-LABEL: use_coshf16:
+define half @test_half_cosh(half %a) nounwind {
+; F16C-LABEL: test_half_cosh:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1443,7 +1443,7 @@ define half @use_coshf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_coshf16:
+; FP16-LABEL: test_half_cosh:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1452,7 +1452,7 @@ define half @use_coshf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_coshf16:
+; X64-LABEL: test_half_cosh:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1461,7 +1461,7 @@ define half @use_coshf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_coshf16:
+; X86-LABEL: test_half_cosh:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1478,8 +1478,8 @@ define half @use_coshf16(half %a) nounwind {
ret half %x
}
-define half @test_sin_f16(half %Val) nounwind {
-; F16C-LABEL: test_sin_f16:
+define half @test2_half_sin(half %Val) nounwind {
+; F16C-LABEL: test2_half_sin:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1488,7 +1488,7 @@ define half @test_sin_f16(half %Val) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: test_sin_f16:
+; FP16-LABEL: test2_half_sin:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1497,7 +1497,7 @@ define half @test_sin_f16(half %Val) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: test_sin_f16:
+; X64-LABEL: test2_half_sin:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1506,7 +1506,7 @@ define half @test_sin_f16(half %Val) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: test_sin_f16:
+; X86-LABEL: test2_half_sin:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1523,8 +1523,8 @@ define half @test_sin_f16(half %Val) nounwind {
ret half %res
}
-define half @use_sinhf16(half %a) nounwind {
-; F16C-LABEL: use_sinhf16:
+define half @test_half_sinh(half %a) nounwind {
+; F16C-LABEL: test_half_sinh:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1533,7 +1533,7 @@ define half @use_sinhf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_sinhf16:
+; FP16-LABEL: test_half_sinh:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1542,7 +1542,7 @@ define half @use_sinhf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_sinhf16:
+; X64-LABEL: test_half_sinh:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1551,7 +1551,7 @@ define half @use_sinhf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_sinhf16:
+; X86-LABEL: test_half_sinh:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1568,8 +1568,8 @@ define half @use_sinhf16(half %a) nounwind {
ret half %x
}
-define half @use_tanf16(half %a) nounwind {
-; F16C-LABEL: use_tanf16:
+define half @test2_half_tan(half %a) nounwind {
+; F16C-LABEL: test2_half_tan:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1578,7 +1578,7 @@ define half @use_tanf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_tanf16:
+; FP16-LABEL: test2_half_tan:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1587,7 +1587,7 @@ define half @use_tanf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_tanf16:
+; X64-LABEL: test2_half_tan:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1596,7 +1596,7 @@ define half @use_tanf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_tanf16:
+; X86-LABEL: test2_half_tan:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
@@ -1613,8 +1613,8 @@ define half @use_tanf16(half %a) nounwind {
ret half %x
}
-define half @use_tanhf16(half %a) nounwind {
-; F16C-LABEL: use_tanhf16:
+define half @test_half_tanh(half %a) nounwind {
+; F16C-LABEL: test_half_tanh:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
@@ -1623,7 +1623,7 @@ define half @use_tanhf16(half %a) nounwind {
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
-; FP16-LABEL: use_tanhf16:
+; FP16-LABEL: test_half_tanh:
; FP16: # %bb.0:
; FP16-NEXT: pushq %rax
; FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
@@ -1632,7 +1632,7 @@ define half @use_tanhf16(half %a) nounwind {
; FP16-NEXT: popq %rax
; FP16-NEXT: retq
;
-; X64-LABEL: use_tanhf16:
+; X64-LABEL: test_half_tanh:
; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq __extendhfsf2 at PLT
@@ -1641,7 +1641,7 @@ define half @use_tanhf16(half %a) nounwind {
; X64-NEXT: popq %rax
; X64-NEXT: retq
;
-; X86-LABEL: use_tanhf16:
+; X86-LABEL: test_half_tanh:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
>From f78d62236a757c11d6aaa4c3db7314c179d10e0c Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Thu, 20 Feb 2025 21:39:29 -0800
Subject: [PATCH 5/6] Removed ppc_fp128 type testcases
---
llvm/test/CodeGen/X86/float-asmprint.ll | 7 -
llvm/test/CodeGen/X86/ppcf128-libcalls.ll | 354 ----------------------
2 files changed, 361 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/ppcf128-libcalls.ll
diff --git a/llvm/test/CodeGen/X86/float-asmprint.ll b/llvm/test/CodeGen/X86/float-asmprint.ll
index 879bcf39e5925..1a3e2c7b57377 100644
--- a/llvm/test/CodeGen/X86/float-asmprint.ll
+++ b/llvm/test/CodeGen/X86/float-asmprint.ll
@@ -4,7 +4,6 @@
; on a little-endian target.
@var128 = global fp128 0xL00000000000000008000000000000000, align 16
- at varppc128 = global ppc_fp128 0xM80000000000000000000000000000000, align 16
@var80 = global x86_fp80 0xK80000000000000000000, align 16
@var64 = global double -0.0, align 8
@var32 = global float -0.0, align 4
@@ -17,12 +16,6 @@
; CHECK-NEXT: .quad 0x8000000000000000
; CHECK-NEXT: .size
-; CHECK: varppc128:
-; For ppc_fp128, the high double always comes first.
-; CHECK-NEXT: .quad 0x8000000000000000 # ppc_fp128 -0
-; CHECK-NEXT: .quad 0x0000000000000000
-; CHECK-NEXT: .size
-
; CHECK: var80:
; CHECK-NEXT: .quad 0x0000000000000000 # x86_fp80 -0
; CHECK-NEXT: .short 0x8000
diff --git a/llvm/test/CodeGen/X86/ppcf128-libcalls.ll b/llvm/test/CodeGen/X86/ppcf128-libcalls.ll
deleted file mode 100644
index 29aca2fdad3ed..0000000000000
--- a/llvm/test/CodeGen/X86/ppcf128-libcalls.ll
+++ /dev/null
@@ -1,354 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android \
-; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=ANDROID
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu \
-; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=GNU
-; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=sse2 \
-; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=X86
-
-; Check all soft floating point library function calls.
-
-
-define ppc_fp128 @use_acosppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_acosppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq acosl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_acosppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq acosl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_acosppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll acosl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.acos.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_asinppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq asinl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_asinppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq asinl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_asinppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll asinl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_atanppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_atanppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq atanl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_atanppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq atanl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_atanppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll atanl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.atan.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_atan2ppc_fp128(ppc_fp128 %a, ppc_fp128 %b) nounwind {
-; ANDROID-LABEL: use_atan2ppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq atan2l at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_atan2ppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq atan2l at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_atan2ppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $108, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
-; X86-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
-; X86-NEXT: movlps %xmm3, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
-; X86-NEXT: movlps %xmm2, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll atan2l
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $108, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.atan2.ppcf128(ppc_fp128 %a, ppc_fp128 %b)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_coshppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_coshppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq coshl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_coshppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq coshl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_coshppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll coshl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.cosh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_sinhppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_sinhppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq sinhl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_sinhppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq sinhl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_sinhppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll sinhl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.sinh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_tanppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_tanppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq tanl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_tanppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq tanl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_tanppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll tanl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.tan.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
-
-define ppc_fp128 @use_tanhppc_fp128(ppc_fp128 %a) nounwind {
-; ANDROID-LABEL: use_tanhppc_fp128:
-; ANDROID: # %bb.0:
-; ANDROID-NEXT: pushq %rax
-; ANDROID-NEXT: callq tanhl at PLT
-; ANDROID-NEXT: popq %rax
-; ANDROID-NEXT: retq
-;
-; GNU-LABEL: use_tanhppc_fp128:
-; GNU: # %bb.0:
-; GNU-NEXT: pushq %rax
-; GNU-NEXT: callq tanhl at PLT
-; GNU-NEXT: popq %rax
-; GNU-NEXT: retq
-;
-; X86-LABEL: use_tanhppc_fp128:
-; X86: # %bb.0:
-; X86-NEXT: subl $76, %esp
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movsd %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, (%esp)
-; X86-NEXT: calll tanhl
-; X86-NEXT: fxch %st(1)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: fstpl {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: fldl {{[0-9]+}}(%esp)
-; X86-NEXT: addl $76, %esp
-; X86-NEXT: retl
- %x = call ppc_fp128 @llvm.tanh.ppcf128(ppc_fp128 %a)
- ret ppc_fp128 %x
-}
>From 1a614665e666157b6913aa85e99e2cb142f0bb66 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Fri, 21 Feb 2025 23:30:27 -0800
Subject: [PATCH 6/6] Removed unrelated test change
---
llvm/test/CodeGen/X86/float-asmprint.ll | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/llvm/test/CodeGen/X86/float-asmprint.ll b/llvm/test/CodeGen/X86/float-asmprint.ll
index 1a3e2c7b57377..879bcf39e5925 100644
--- a/llvm/test/CodeGen/X86/float-asmprint.ll
+++ b/llvm/test/CodeGen/X86/float-asmprint.ll
@@ -4,6 +4,7 @@
; on a little-endian target.
@var128 = global fp128 0xL00000000000000008000000000000000, align 16
+ at varppc128 = global ppc_fp128 0xM80000000000000000000000000000000, align 16
@var80 = global x86_fp80 0xK80000000000000000000, align 16
@var64 = global double -0.0, align 8
@var32 = global float -0.0, align 4
@@ -16,6 +17,12 @@
; CHECK-NEXT: .quad 0x8000000000000000
; CHECK-NEXT: .size
+; CHECK: varppc128:
+; For ppc_fp128, the high double always comes first.
+; CHECK-NEXT: .quad 0x8000000000000000 # ppc_fp128 -0
+; CHECK-NEXT: .quad 0x0000000000000000
+; CHECK-NEXT: .size
+
; CHECK: var80:
; CHECK-NEXT: .quad 0x0000000000000000 # x86_fp80 -0
; CHECK-NEXT: .short 0x8000
More information about the llvm-commits
mailing list