[llvm] RegAlloc: Fix verifier error after failed allocation (PR #119690)
LLVM Continuous Integration via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 08:09:25 PST 2025
llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `llvm-clang-x86_64-expensive-checks-ubuntu` running on `as-builder-4` while building `llvm` at step 6 "test-build-unified-tree-check-all".
Full details are available at: https://lab.llvm.org/buildbot/#/builders/187/builds/4464
<details>
<summary>Here is the relevant piece of the build log for the reference</summary>
```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/ran-out-of-registers-errors.ll' FAILED ********************
Exit Code: 1
Command Output (stderr):
--
RUN: at line 1: not /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=greedy -filetype=null /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll 2>&1 | /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/FileCheck -check-prefixes=CHECK,GREEDY -implicit-check-not=error /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+ not /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=greedy -filetype=null /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+ /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/FileCheck -check-prefixes=CHECK,GREEDY -implicit-check-not=error /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
RUN: at line 2: not /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=basic -filetype=null /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll 2>&1 | /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/FileCheck -implicit-check-not=error -check-prefixes=CHECK,BASIC /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+ /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/FileCheck -implicit-check-not=error -check-prefixes=CHECK,BASIC /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+ not /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/build/bin/llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=basic -filetype=null /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
/home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll:28:10: error: CHECK: expected string not found in input
; CHECK: error: inline assembly requires more registers than available at line 23
^
<stdin>:1:113: note: scanning from here
error: <unknown>:0:0: ran out of registers during register allocation in function 'ran_out_of_registers_general'
^
Input file: <stdin>
Check file: /home/buildbot/worker/as-builder-4/ramdisk/expensive-checks/llvm-project/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
-dump-input=help explains the following input dump.
Input was:
<<<<<<
1: error: <unknown>:0:0: ran out of registers during register allocation in function 'ran_out_of_registers_general'
check:28 X error: no match found
2:
check:28 ~
3: # After Basic Register Allocator
check:28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
4: ********** INTERVALS **********
check:28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5: VGPR0_LO16 [0B,32r:0)[140r,144r:1) 0 at 0B-phi 1 at 140r
check:28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6: VGPR0_HI16 [0B,32r:0)[140r,144r:1) 0 at 0B-phi 1 at 140r
check:28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.
.
.
>>>>>>
--
********************
```
</details>
https://github.com/llvm/llvm-project/pull/119690
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