[llvm] [DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (PR #127083)

[James Chesterman via llvm-commits]

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@@ -836,9 +836,8 @@ void TargetLoweringBase::initActions() {
     setOperationAction(ISD::SET_FPENV, VT, Expand);
     setOperationAction(ISD::RESET_FPENV, VT, Expand);
 
-    // PartialReduceMLA operations default to expand.
-    setOperationAction({ISD::PARTIAL_REDUCE_UMLA, ISD::PARTIAL_REDUCE_SMLA}, VT,
-                       Expand);
+    for (MVT InputVT : MVT::all_valuetypes())
+      setPartialReduceMLAAction(VT, InputVT, Expand);
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JamesChesterman wrote:

When the combine is performed and then the combine function is performed, the code generation for the NEON cases is quite a bit longer. There is even a test case that gets longer when the flag `-aarch64-enable-partial-reduce-nodes` is not present.

https://github.com/llvm/llvm-project/pull/127083