[llvm] [ConstraintElim] Check the other signedness when hasSameSign (PR #128168)

Marina Taylor via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 21 04:22:59 PST 2025


https://github.com/citymarina created https://github.com/llvm/llvm-project/pull/128168

None

>From db07315619d58160f05f8c1e94361315a92b25d9 Mon Sep 17 00:00:00 2001
From: Marina Taylor <marina_taylor at apple.com>
Date: Fri, 21 Feb 2025 12:16:40 +0000
Subject: [PATCH 1/2] [ConstraintElim] Add samesign test. NFC

---
 .../transfer-samesign-facts.ll                | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll b/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
index 1b155e050de29..1e0337d6ddad5 100644
--- a/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
+++ b/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
@@ -303,3 +303,24 @@ define i1 @ugt_assumed_positive_values(i8 %a, i8 %b) {
 
   ret i1 %result
 }
+
+define i1 @samesign_flipped_signedness(i8 %a)  {
+; CHECK-LABEL: @samesign_flipped_signedness(
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i8 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP1]], label [[GREATER:%.*]], label [[EXIT:%.*]]
+; CHECK:       greater:
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp samesign sgt i8 [[A]], 0
+; CHECK-NEXT:    ret i1 [[TMP2]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret i1 false
+;
+  %1 = icmp ugt i8 %a, 0
+  br i1 %1, label %greater, label %exit
+
+greater:
+  %2 = icmp samesign sgt i8 %a, 0
+  ret i1 %2
+
+exit:
+  ret i1 false
+}

>From 95b8c00b38db4dce58e91b73843b446d70463b94 Mon Sep 17 00:00:00 2001
From: Marina Taylor <marina_taylor at apple.com>
Date: Fri, 21 Feb 2025 12:19:29 +0000
Subject: [PATCH 2/2] [ConstraintElim] Check the other signedness when
 hasSameSign

---
 llvm/lib/Transforms/Scalar/ConstraintElimination.cpp     | 9 ++++++++-
 .../ConstraintElimination/transfer-samesign-facts.ll     | 3 +--
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 6dd26910f6846..9a1a3f3dfeabc 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -1427,7 +1427,7 @@ static std::optional<bool> checkCondition(CmpInst::Predicate Pred, Value *A,
 }
 
 static bool checkAndReplaceCondition(
-    CmpInst *Cmp, ConstraintInfo &Info, unsigned NumIn, unsigned NumOut,
+    ICmpInst *Cmp, ConstraintInfo &Info, unsigned NumIn, unsigned NumOut,
     Instruction *ContextInst, Module *ReproducerModule,
     ArrayRef<ReproducerEntry> ReproducerCondStack, DominatorTree &DT,
     SmallVectorImpl<Instruction *> &ToRemove) {
@@ -1460,6 +1460,13 @@ static bool checkAndReplaceCondition(
           checkCondition(Cmp->getPredicate(), Cmp->getOperand(0),
                          Cmp->getOperand(1), Cmp, Info))
     return ReplaceCmpWithConstant(Cmp, *ImpliedCondition);
+
+  if (Cmp->hasSameSign())
+    if (auto ImpliedCondition = checkCondition(
+            ICmpInst::getFlippedSignednessPredicate(Cmp->getPredicate()),
+            Cmp->getOperand(0), Cmp->getOperand(1), Cmp, Info))
+      return ReplaceCmpWithConstant(Cmp, *ImpliedCondition);
+
   return false;
 }
 
diff --git a/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll b/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
index 1e0337d6ddad5..09cbbf1c661c7 100644
--- a/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
+++ b/llvm/test/Transforms/ConstraintElimination/transfer-samesign-facts.ll
@@ -309,8 +309,7 @@ define i1 @samesign_flipped_signedness(i8 %a)  {
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i8 [[A:%.*]], 0
 ; CHECK-NEXT:    br i1 [[TMP1]], label [[GREATER:%.*]], label [[EXIT:%.*]]
 ; CHECK:       greater:
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp samesign sgt i8 [[A]], 0
-; CHECK-NEXT:    ret i1 [[TMP2]]
+; CHECK-NEXT:    ret i1 true
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i1 false
 ;



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