[llvm] Adding support in llvm-exegesis for Aarch64 for handling FPR64/128, PPR16 and ZPR128 reg class. (PR #127564)

[via llvm-commits]

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+# RUN: llvm-exegesis -mcpu=neoverse-v2 -mode=latency -opcode-name=ADDVv16i8v | FileCheck %s
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lakshayk-nv wrote:

Combined all four test cases in one test file. Thanks for the suggestion!!

https://github.com/llvm/llvm-project/pull/127564