[llvm] [PowerPC] custom lower v1024i1 load/store (PR #126969)

[Maryam Moghadas via llvm-commits]

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@@ -55,7 +55,7 @@ define void @ass_acc(ptr %ptr, <16 x i8> %vc) {
 ; CHECK-O0-NEXT:    vmr v3, v4
 ; CHECK-O0-NEXT:    vmr v2, v4
 ; CHECK-O0-NEXT:    dmxxinstfdmr512 wacc0, vsp34, vsp34, 0
-; CHECK-O0-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
+; CHECK-O0-NEXT:    dmxxextfdmr512 wacc0, vsp36, vsp34, 0
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maryammo wrote:

I am not sure how the extracted values are placed into vector pairs in different orders while the subsequent use of those vr's are the same.  

https://github.com/llvm/llvm-project/pull/126969