[llvm] Adding support in llvm-exegesis for Aarch64 for handling FPR64/128, PPR16 and ZPR128 reg class. (PR #127564)
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 20 12:41:14 PST 2025
================
@@ -51,6 +89,18 @@ class ExegesisAArch64Target : public ExegesisTarget {
return {loadImmediate(Reg, 32, Value)};
if (AArch64::GPR64RegClass.contains(Reg))
return {loadImmediate(Reg, 64, Value)};
+
+ if (AArch64::PPRRegClass.contains(Reg))
+ return {loadPPRImmediate(Reg, 16, Value)};
+
----------------
boomanaiden154 wrote:
Nit: The spacing here seems very inconsistent? No newlines between if statements for various reg classes would be canonical for llvm-exegesis.
https://github.com/llvm/llvm-project/pull/127564
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