[clang] [llvm] [RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (PR #124706)

[Sam Elliott via llvm-commits]

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+# Xqcilia - Qualcomm uC Large Immediate Arithmetic extension
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-xqcilia < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-PLUS,CHECK-IMM %s
+# RUN: not llvm-mc -triple riscv32 -mattr=-experimental-xqcilia < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-MINUS,CHECK-EXT %s
+
+# CHECK-PLUS: :[[@LINE+2]]:12: error: register must be a GPR excluding zero (x0)
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lenary wrote:

This is one of the reasons I intend to work on the DiagnosticPredicate use in RISC-V, but I haven't yet got back to it.

AArch64, where they use diagnosticpredicates, they will give you guidance if you're a register, or say "invalid operand for instruction" if you give an immediate where only a register is allowed.

My work on this has slowed as we're doing our own release work, but I hope to get back to it. 

https://github.com/llvm/llvm-project/pull/124706